EP610ILC-10 vs EP610DC-30 Comparison
Detailed side-by-side comparison of EP610ILC-10 by Altera and EP610DC-30 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP610ILC-10 | EP610DC-30 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $7.20 | $10.40 |
| Device Family | Classic EPLD | β |
| Product Type | UV-Erasable / OTP PLD | Classic EPLD (Erasable Programmable Logic Device) |
| Architecture | PAL-type with macrocells | β |
| Macrocells | 16 | 16 |
| Usable Gates | 300 | 300 |
| Product Terms | 160 | β |
| I/O Pins | 16 | 16 (with output enable) |
| Dedicated Inputs | 4 | 16 |
| Supply Voltage | 5 V (single supply) | β |
| Pin-to-Pin Delay (tPD) | 10 ns (grade -10) | β |
| Counter Frequency (fCNT) | 100 MHz | β |
| Logic Family Compatibility | TTL (5 V CMOS/TTL-compatible I/O) | β |
| Package | PLCC-28 (plastic J-lead chip carrier) | 24-pin CERDIP (windowed) |
| Mounting Type | Surface Mount (PLCC socket or solder) | Through-Hole |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | Commercial (0C to +70C) |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | β |
| Family | β | EP610 (Classic Device Family) |
| Logic Expanders | β | 4 (4 product terms per macrocell) |
| Maximum Pipelined Clock Frequency | β | 100 MHz |
| Propagation Delay (tPD) | β | 30 ns |
| Speed Grade | β | -30 (30 ns tPD) |
| Technology | β | CMOS EPROM |
| Programmability | β | UV-erasable, windowed EPROM |
| Security Bit | β | Yes (protects design after programming) |
| Output Modes | β | Registered and Combinatorial |