EP610ILC-25 vs EP610ILC-10 Comparison
Detailed side-by-side comparison of EP610ILC-25 by Altera and EP610ILC-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP610ILC-25 | EP610ILC-10 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.85 | $7.20 |
| Family | Classic EPLD (EP610 series) | β |
| Device Type | EEPLD (Electrically Erasable PLD) | β |
| Usable Gates | 300 | 300 |
| Macrocells | 16 | 16 |
| Product Terms | 160 | 160 |
| Maximum Operating Frequency (fMAX) | 40 MHz | β |
| Pin-to-Pin Propagation Delay (tPD) | 25 ns | β |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | β |
| Nominal Supply Voltage | 5 V | β |
| Total Inputs | 20 | β |
| Dedicated Inputs | 4 | 4 |
| Bidirectional I/O Pins | 16 | β |
| Operating Temperature Range | 0 C to +70 C (commercial) | β |
| Package | 28-pin PLCC (J-lead) | PLCC-28 (plastic J-lead chip carrier) |
| Mounting Type | Surface Mount | Surface Mount (PLCC socket or solder) |
| Process Technology | CMOS, electrically erasable | β |
| Programming Method | In-system, electrically erasable | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| Device Family | β | Classic EPLD |
| Product Type | β | UV-Erasable / OTP PLD |
| Architecture | β | PAL-type with macrocells |
| I/O Pins | β | 16 |
| Supply Voltage | β | 5 V (single supply) |
| Pin-to-Pin Delay (tPD) | β | 10 ns (grade -10) |
| Counter Frequency (fCNT) | β | 100 MHz |
| Logic Family Compatibility | β | TTL (5 V CMOS/TTL-compatible I/O) |
| Operating Temperature | β | [DATA_NEEDED: operating temperature range] |