EP910DC-40 vs EP910LC-30 Comparison
Detailed side-by-side comparison of EP910DC-40 by Altera and EP910LC-30 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910DC-40 | EP910LC-30 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $13.95 | $22.50 |
| Device Family | Classic EPLD (EP910 series) | β |
| Architecture | PAL-type AND/OR, UV-erasable CMOS | β |
| Macrocells | 24 | β |
| Dedicated Inputs | 12 | β |
| Bidirectional I/O Pins | 24 | β |
| Total Inputs to Logic Array | 36 | β |
| Product Terms | 240 maximum | β |
| Maximum Propagation Delay (tPD) | 40 ns | β |
| Maximum Operating Frequency (fMAX) | 25 MHz | β |
| Global Clocks | 2 | β |
| Supply Voltage | 5 V (typical for Classic EPLD family) | β |
| Operating Temperature (Commercial) | 0 Β°C to 70 Β°C | β |
| Package | DIP-40 (ceramic, through-hole) | β |
| Mounting Type | Through-Hole | β |
| RoHS Status | [DATA_NEEDED: rohs_status] | [DATA_NEEDED: RoHS status] |
| Programming Method | UV-erase + EPROM programmer; on-board logic test circuitry | β |
| Device Type | β | EPLD (Erasable Programmable Logic Device) |
| Macrocell Count | β | 24 |
| Propagation Delay (tPD) | β | 30 ns (max) |
| Maximum Toggle Frequency | β | 62 MHz |
| Supply Voltage (VCC) | β | 5 V (nominal, TTL) |
| Process Technology | β | CMOS (EPROM-based) |
| Package Type | β | PDIP-40 (Plastic DIP, through-hole) |
| Operating Temperature Grade | β | Commercial (0C to +70C) |
| I/O Pin Count | β | 24 |
| Dedicated Input Pins | β | 36 (including I/O) |
| Product Terms per Macrocell | β | Up to 16 |
| Programming Technology | β | UV-erasable EPROM cell |
| Development Tool | β | Altera MAX+PLUS II |
| MSL Level | β | [DATA_NEEDED: MSL level] |