EP910LC-30T vs EP910LC-30Y Comparison
Detailed side-by-side comparison of EP910LC-30T by Altera and EP910LC-30Y by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LC-30T | EP910LC-30Y |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $7.10 | $25.40 |
| Part Number | EP910LC-30T | β |
| Manufacturer | Altera (Rochester Electronics) | β |
| Device Family | Classic EPLD | β |
| Macrocells | 24 | 24 |
| Usable Gates | 450 | 450 |
| Propagation Delay (tPD) | 30 ns | β |
| Maximum Operating Frequency | 33.3 MHz | β |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | β |
| Technology | CMOS, UV-erasable / OTP | β |
| User I/O Pins | 36 | β |
| Package | 44-pin PLCC (J-lead) | PLCC-44 |
| Mounting Type | Surface Mount | Surface Mount (PLCC socket) |
| Operating Temperature | [DATA_NEEDED: operating temperature] | Commercial 0C to +70C |
| Programmable Pins | Bidirectional, tri-state | β |
| Programming Interface | Altera MAX+PLUS II | β |
| RoHS Status | unknown | [DATA_NEEDED: RoHS status not specified in retrieved data] |
| Lead-Free | unknown | β |
| Family | β | Altera Classic EPLD |
| Device Type | β | EPLD (Erasable Programmable Logic Device) |
| Pin-to-Pin Delay (tPD) | β | 30 ns |
| Counter Frequency (fMAX) | β | 100 MHz (family maximum) |
| Supply Voltage | β | 5 V (TTL-compatible) |
| Process Technology | β | CMOS, UV-erasable / OTP |
| Speed/Power Grade | β | LC (low-power, 30ns) |
| Processing Flow | β | Y (extended reliability) |
| Logic Compatibility | β | 100% TTL emulation |