EP910LI-35 vs EP910JC-30 Comparison
Detailed side-by-side comparison of EP910LI-35 by Altera and EP910JC-30 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LI-35 | EP910JC-30 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $25.80 | $9.75 |
| Family | Altera Classic EPLD | Classic EPLD (MAX-style) |
| Device Series | EP910 | β |
| Usable Gates | 900 | β |
| Macrocells | 24 | 24 |
| Maximum User I/O Pins | 38 | β |
| Propagation Delay (t_PD) | 35 ns | β |
| Maximum Counter Frequency (f_CNT) | 76.9 MHz | β |
| Supply Voltage | 5 V (4.75 V to 5.25 V) | β |
| Operating Temperature | -40 Β°C to +85 Β°C (Industrial) | [DATA_NEEDED: operating temperature range] |
| Package | 44-pin PLCC (J-lead) | 44-pin Windowed Ceramic J-Lead Chip Carrier (CQCC-44 / JLCC-44) |
| Process Technology | CMOS EPROM | β |
| Programming Technology | EPROM (UV-erasable) | β |
| Erase/Program Cycles | β₯100 | β |
| Mounting Type | Surface Mount | Surface Mount (socket-mountable) |
| Lead Pitch | 1.27 mm | β |
| Propagation Delay (tpd) | β | 30 ns |
| Maximum Internal Frequency (Fmax) | β | 33.3 MHz |
| Inputs | β | 36 |
| Product Terms | β | 240 |
| Outputs | β | 10 dedicated |
| Supply Voltage (Vcc) | β | 5 V |
| Technology | β | CMOS EPROM, UV-erasable |
| Supply Current (Icc) | β | [DATA_NEEDED: Icc typical / maximum] |
| RoHS Status | β | [DATA_NEEDED: RoHS compliance] |
| Logic Blocks | β | 24 macrocells (AND/OR array architecture) |