EP910LI-35 vs EP910LC-25 Comparison
Detailed side-by-side comparison of EP910LI-35 by Altera and EP910LC-25 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LI-35 | EP910LC-25 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $25.80 | $2.20 |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Device Series | EP910 | β |
| Usable Gates | 900 | β |
| Macrocells | 24 | 24 |
| Maximum User I/O Pins | 38 | β |
| Propagation Delay (t_PD) | 35 ns | β |
| Maximum Counter Frequency (f_CNT) | 76.9 MHz | β |
| Supply Voltage | 5 V (4.75 V to 5.25 V) | β |
| Operating Temperature | -40 Β°C to +85 Β°C (Industrial) | 0C to +70C (commercial) |
| Package | 44-pin PLCC (J-lead) | 28-pin PLCC (LC suffix) |
| Process Technology | CMOS EPROM | β |
| Programming Technology | EPROM (UV-erasable) | β |
| Erase/Program Cycles | β₯100 | β |
| Mounting Type | Surface Mount | Surface Mount |
| Lead Pitch | 1.27 mm | β |
| Logic Gates | β | [DATA_NEEDED: logic gate count] |
| Propagation Delay (tPD) | β | 25 ns |
| Dedicated Inputs | β | 16 |
| Technology | β | CMOS (EPROM-based) |
| Operating Voltage | β | [DATA_NEEDED: VCC range] |
| Programmable | β | Yes (EPROM, UV-erasable on windowed variants) |
| I/O Pins | β | [DATA_NEEDED: I/O count] |
| RoHS Status | β | [DATA_NEEDED: RoHS status] |
| Lead-Free | β | [DATA_NEEDED: lead-free status] |
| Maximum Frequency | β | [DATA_NEEDED: fMAX] |