EP910LI-35 vs EP910LI-12 Comparison
Detailed side-by-side comparison of EP910LI-35 by Altera and EP910LI-12 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910LI-35 | EP910LI-12 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $25.80 | $15.95 |
| Family | Altera Classic EPLD | β |
| Device Series | EP910 | β |
| Usable Gates | 900 | 450 |
| Macrocells | 24 | 24 |
| Maximum User I/O Pins | 38 | β |
| Propagation Delay (t_PD) | 35 ns | β |
| Maximum Counter Frequency (f_CNT) | 76.9 MHz | β |
| Supply Voltage | 5 V (4.75 V to 5.25 V) | β |
| Operating Temperature | -40 Β°C to +85 Β°C (Industrial) | -40C to +85C (industrial) |
| Package | 44-pin PLCC (J-lead) | 28-PLCC (windowed ceramic, J-Lead) |
| Process Technology | CMOS EPROM | 1.0-micron CMOS EPROM |
| Programming Technology | EPROM (UV-erasable) | β |
| Erase/Program Cycles | β₯100 | β |
| Mounting Type | Surface Mount | β |
| Lead Pitch | 1.27 mm | β |
| Device Family | β | Altera Classic EPLD |
| Propagation Delay (tPD) | β | 12 ns |
| Maximum Frequency (fMAX) | β | 76.9 MHz |
| Supply Voltage (VCC) | β | 4.75 V to 5.25 V (5 V typical) |
| I/O Pins | β | 24 |
| Inputs (with input registers) | β | 36 |
| Power Dissipation (typical) | β | 200 mW at 5 V |
| Programming Method | β | UV-erasable via windowed package |
| Logic Compatibility | β | TTL-compatible I/O |
| RoHS Status | β | non_compliant (ceramic windowed package) |