EP910PI-20 vs EP910PI-25 Comparison
Detailed side-by-side comparison of EP910PI-20 by Altera and EP910PI-25 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP910PI-20 | EP910PI-25 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $9.75 | $10.95 |
| Device Family | Altera Classic EPLD Family | β |
| Macrocells | 24 | 24 |
| Propagation Delay (tPD) | 20 ns | β |
| Package | PDIP-40 (PI suffix) | PDIP-40 (Plastic DIP) |
| Mounting Type | Through-Hole | Through-Hole |
| Supply Voltage (VCC) | 5 V (+/- 5%) | 5 V nominal |
| Operating Temperature | -40C to +85C (industrial) | 0C to +70C (commercial) |
| Technology | CMOS EPROM (UV-erasable windowed variants available) | β |
| Configuration Method | Non-volatile EPROM (no boot PROM required) | β |
| Dedicated Inputs | 12 | 12 |
| Bidirectional I/O Pins | 24 | β |
| Maximum Counter Frequency | 125 MHz | β |
| Output Drive Current (IOL) | 24 mA (TTL-compatible) | β |
| Programmable Polarity | Yes (XOR gate per macrocell) | β |
| Macrocell Flip-Flop | Yes (D-type, programmable) | β |
| Power Dissipation | [DATA_NEEDED: typical power dissipation in mW] | β |
| Programming Interface | JEDEC file via Altera programming hardware | β |
| RoHS Status | unknown | Non-compliant (PDIP package) |
| MIL-STD-883 Variant | EP910DM/883B (separate part number) | β |
| Family | β | Altera Classic EPLD |
| Device | β | EP910 |
| I/O Pins | β | 24 |
| Pin-to-Pin Propagation Delay (tPD) | β | 25 ns |
| Maximum Clock Frequency (fMAX) | β | 40 MHz |
| Process Technology | β | 5 V CMOS (EPROM-based) |
| Pin Count | β | 40 |
| Programmability | β | UV-erasable (windowed) / one-time-programmable |