EPC1213LC20 vs EPC1441LC20N Comparison

Detailed side-by-side comparison of EPC1213LC20 by Intel and EPC1441LC20N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPC1213LC20 EPC1441LC20N
Brand Intel Intel
Category EEPROM Memory ICs
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $7.40 $7.95
Memory Type OTP Configuration PROM (Flash-based) OTP EPROM (One-Time Programmable)
Memory Size 212 Kbit 440 Kbit
Interface Serial (Altera FPGA configuration protocol) Serial, 4-wire (nCS, DCLK, DATA, nINIT_CONF)
Maximum Configuration Clock 6 MHz β€”
Supply Voltage (Core) 5.0 V β€”
I/O Voltage Tolerance 3.3 V / 5.0 V β€”
Programmability One-Time Programmable (OTP) via IEEE 1149.1 JTAG β€”
In-System Programmability Yes (5.0 V and 3.3 V ISP) β€”
Supported FPGA Families ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX
Compression Support Yes (FPGA decompresses bitstream during load) β€”
Operating Temperature 0C to +70C (Commercial) 0 C to +70 C (commercial)
Package 20-PLCC (J-lead, 9x9 mm) 20-PLCC (J-Lead, 9 x 9 mm)
Package Code QCCJ β€”
Mounting Type Surface Mount Surface Mount (PLCC socket compatible)
RoHS Status [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
Organization β€” 55 K x 8 bit
Configuration Clock (DCLK) β€” 8 MHz maximum
Programming Interface β€” JTAG (IEEE 1149.1) / Altera Programming Unit
Supply Voltage β€” 3.3 V (typical)
Cascadable β€” Yes (nCS daisy-chain)
MSL Level β€” [DATA_NEEDED: MSL level]
Lead-Free β€” [DATA_NEEDED: lead-free status]

Datasheets & Resources

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