EPC8820ARC208-3N vs EPF8820ARC208-3 Comparison

Detailed side-by-side comparison of EPC8820ARC208-3N by Altera and EPF8820ARC208-3 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPC8820ARC208-3N

EPC8820ARC208-3N - 672-Cell FLEX 8000 PLD, 5V, RQFP-208 | Altera

EPC8820ARC208-3N Obsolete
Intel
EPF8820ARC208-3

EPF8820ARC208-3 - FLEX 8000 FPGA, 8K Gates, 672 Cells | Intel / Altera

EPF8820ARC208-3 Obsolete

Specification Comparison

Parameter EPC8820ARC208-3N EPF8820ARC208-3
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $21.25 $62.00
Family FLEX 8000 FLEX 8000 (EPF8820)
Device Type SRAM-based Programmable Logic Device (PLD) β€”
Usable Gates 8,000 8,000
Logic Cells / Logic Elements (LEs) 672 β€”
Maximum User I/O 152 β€”
Maximum Operating Frequency 125 MHz 125 MHz
Propagation Delay (tpd) 5.0 ns β€”
Process Technology 0.42 Β΅m CMOS 0.42 Β΅m CMOS
Core Supply Voltage (VCCINT) 5.0 V nominal (4.75 V to 5.25 V) β€”
I/O Supply Voltage (VCCIO) 3.3 V or 5 V (programmable I/O standard) β€”
Operating Temperature Grade Industrial (N suffix) β€”
Configuration Method SRAM, loaded via external EPROM or Altera serial configuration device (EPC1 / EPC1064 / EPC1213 / EPC1441) β€”
Package 208-pin RQFP (Plastic Quad Flat Pack) β€”
Mounting Type Surface Mount Surface Mount
RoHS Status unknown [DATA_NEEDED: RoHS status]
Lead-Free unknown β€”
Configuration Device Compatibility EPC1, EPC1064, EPC1213, EPC1441 (per manufacturer datasheet) β€”
Series β€” FLEX 8000
Logic Cells / Elements β€” 672
Registers β€” 152
Supply Voltage (VCC) β€” 4.75 V to 5.25 V
Configuration Memory β€” SRAM (volatile)
Package / Case β€” 208-BFQFP Exposed Pad (208-RQFP, 28x28 mm)
Supplier Device Package β€” 208-RQFP (28x28)
Packaging β€” Tray
Operating Temperature Range β€” [DATA_NEEDED: operating temperature range]
In-Circuit Reconfigurability (ICR) β€” Yes (via external configuration devices)
Boundary-Scan Test β€” JTAG (IEEE 1149.1)
I/O Tolerance β€” 3.3 V / 5 V
Clock Networks β€” 4 dedicated low-skew global clocks
Lead-Free / Finish β€” [DATA_NEEDED: lead-free finish]

Datasheets & Resources

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