EPF10K100EBC356-1N vs EPF10K100EBC356-2 Comparison
Detailed side-by-side comparison of EPF10K100EBC356-1N by Altera and EPF10K100EBC356-2 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPF10K100EBC356-1N
EPF10K100EBC356-1N - FLEX 10KE FPGA 100K Gates 356-BGA | Altera
EPF10K100EBC356-1N NrndIntel
EPF10K100EBC356-2
EPF10K100EBC356-2 - 100K Gates FLEX 10KE FPGA 274 I/O BGA-356 | Intel
EPF10K100EBC356-2 ObsoleteSpecification Comparison
| Parameter | EPF10K100EBC356-1N | EPF10K100EBC356-2 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $108.00 | $59.95 |
| Family | FLEX 10KE | Embedded Programmable Logic Device (PLD) |
| Series | FLEX-10KE | FLEX-10KE |
| Typical Gates | 100,000 | 100,000 |
| Logic Elements / Cells | 4,992 | β |
| Total RAM Bits | 49,152 | 49,152 |
| Logic Array Blocks (LABs) | 624 | β |
| User I/O Pins | 274 | 274 |
| Package | 356-LBGA (35x35 mm) | β |
| Logic Family | CMOS (SRAM-based) | β |
| Propagation Delay | 0.6 ns | β |
| Core Supply Voltage | 2.375 V to 2.625 V (2.5 V nominal) | β |
| I/O Supply Voltage | 3.3 V | β |
| Operating Temperature | 0C to +70C (commercial) | 0 C to 70 C (Commercial) |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | Non-RoHS (legacy 'N' suffix) | [DATA_NEEDED: RoHS compliance] |
| Lead-Free | Yes (Pb-free 'N' suffix per Altera legacy scheme) | [DATA_NEEDED: lead-free status] |
| Maximum System Gates | β | 158,000 |
| Logic Elements (LEs) | β | 4,992 |
| Number of LABs/CLBs | β | 624 |
| Embedded Array Blocks (EABs) | β | 12 |
| Supply Voltage (Core) | β | 2.375 V to 2.625 V (2.5 V nominal) |
| Propagation Delay (tPD) | β | 0.5 ns |
| Internal Operating Frequency | β | up to 250 MHz |
| Process Technology | β | CMOS, SRAM-based |
| Package Type | β | 356-LBGA (35 x 35 mm, 1.27 mm pitch) |
| Configuration Method | β | SRAM, JTAG (IEEE 1149.1) |
| Speed Grade | β | -2 |