EPF10K250EBI600-3 vs EPF10K250EBC600-3 Comparison
Detailed side-by-side comparison of EPF10K250EBI600-3 by Intel and EPF10K250EBC600-3 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPF10K250EBI600-3 - 250K Gates FLEX 10KE FPGA, 600-BGA | Intel
EPF10K250EBI600-3 β Last Time Buy
Specification Comparison
| Parameter | EPF10K250EBI600-3 | EPF10K250EBC600-3 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $110.00 | $205.00 |
| Family | FLEX 10KE | FLEX 10KE |
| Logic Elements | 12,160 | 12,160 LEs |
| Typical Gate Count | 250,000 system gates | β |
| Embedded System Blocks (ESBs) | 12 | β |
| Maximum User I/O | 470 | 470 |
| Dedicated Inputs | 4 | β |
| PLLs | 4 | β |
| On-chip RAM | Up to 40 Kbits | β |
| Package | 600-ball BGA (HBGA) | 600-ball FineLine BGA |
| Ball Pitch | 1.93 mm | β |
| Core Voltage | 2.3 V (FLEX 10KE standard) [DATA_NEEDED: confirm exact VCCINT] | β |
| Operating Temperature | Industrial, 0C to +85C [DATA_NEEDED: confirm -40C to +85C range] | [DATA_NEEDED: operating temperature range] |
| Speed Grade | -3 (fastest) | -3 |
| Process Technology | 0.22 Β΅m CMOS, 4-layer metal | SRAM-based CMOS |
| Configuration Method | SRAM, requires external configuration device (EPC series) | β |
| Mounting Type | Surface Mount | β |
| RoHS Status | Not specified (SnPb / tin-lead finish per legacy distributor listing) | β |
| Lead-free | no (legacy tin-lead per distributor description) | β |
| Typical Gates | β | 250,000 |
| Embedded Array Blocks (EABs) | β | 12 (each 2 Kbits) |
| Total Embedded Memory | β | 24 Kbits (RAM) |
| PLLs (Phase-Locked Loops) | β | 4 |
| Dedicated Clock Inputs | β | 6 |
| Core Supply Voltage | β | 3.3 V |
| I/O Supply Voltage | β | 3.3 V (5 V tolerant) |
| Configuration Mode | β | Passive Serial / Passive Parallel / JTAG |
| Boundary Scan | β | IEEE 1149.1 (JTAG) |