EPF8820ARC240-3 vs EPF8820ARC240-4 Comparison
Detailed side-by-side comparison of EPF8820ARC240-3 by Altera and EPF8820ARC240-4 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPF8820ARC240-3 - FLEX 8000 FPGA 672 LE | Intel/Altera | 240-pin RQFP
EPF8820ARC240-3 ObsoleteSpecification Comparison
| Parameter | EPF8820ARC240-3 | EPF8820ARC240-4 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $24.00 | $17.20 |
| Family | FLEX 8000 | FLEX 8000 |
| Device Model | EPF8820 | β |
| Logic Elements | 672 | 672 |
| Usable Gates | ~8,000 | β |
| Embedded Array Blocks (EABs) | [DATA_NEEDED: number of EABs] | 16 |
| Maximum User I/O | [DATA_NEEDED: user I/O count] | β |
| Process Technology | 0.42 Β΅m CMOS, 3-layer metal | CMOS SRAM |
| Configuration Memory | SRAM-based (volatile), ISP via JTAG | β |
| Speed Grade | -3 | -4 |
| Package | RQFP-240 (240-pin) | RQFP-240 (240-pin Reduced Quad Flat Pack) |
| Pin/Package Designator | RC240 | β |
| Mounting Type | Surface Mount | Surface Mount (RQFP) |
| Core Supply Voltage | 5.0 V Β±5% (4.75V to 5.25V) | β |
| I/O Standards | 5.0V PCI, 3.3V LVTTL/LVCMOS | β |
| Operating Temperature | [DATA_NEEDED: temperature grade] | [DATA_NEEDED: operating temperature range] |
| MSL Level | [DATA_NEEDED: MSL level] | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | unknown |
| Lead-Free | [DATA_NEEDED: lead-free status] | β |
| Configuration Interface | JTAG (IEEE 1149.1), passive serial/parallel, EPC | β |
| Manufacturer | Altera Corporation (now Intel PSG) | β |
| Typical Gates | β | 8000 usable gates |
| Maximum RAM Bits | β | 4096 bits |
| Maximum User I/O Pins | β | [DATA_NEEDED: user I/O pin count] |
| Supply Voltage (VCCINT) | β | 5.0 V |
| I/O Voltage (VCCIO) | β | 3.3 V or 5.0 V |
| Programmability | β | SRAM, in-system via JTAG (IEEE 1149.1) |
| Configuration Schemes | β | Passive serial, passive parallel, JTAG |