EPF8820ARI208-1 vs EPF8636ARC208-4 Comparison
Detailed side-by-side comparison of EPF8820ARI208-1 by Altera and EPF8636ARC208-4 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPF8820ARI208-1
EPF8820ARI208-1 - FLEX 8000 FPGA, 672 LEs, 5V, 208-RQFP | Altera
EPF8820ARI208-1 NrndAltera
EPF8636ARC208-4
EPF8636ARC208-4 - FLEX 8000 FPGA, 6K Gates, 208-RQFP | Altera
EPF8636ARC208-4 ObsoleteSpecification Comparison
| Parameter | EPF8820ARI208-1 | EPF8636ARC208-4 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $20.40 | $16.50 |
| Family | FLEX 8000 | β |
| Technology | SRAM-based, 0.42 Β΅m CMOS | β |
| Usable Gates | 8,000 | 6,000 |
| Logic Elements (LEs) | 672 | β |
| Flip-Flops | 820 | β |
| Maximum User I/O | 152 | 218 |
| Embedded Memory | [DATA_NEEDED: embedded memory bits] | β |
| Supply Voltage (VCCINT) | 5 V nominal (4.5 V to 5.5 V) | 4.75 V to 5.25 V |
| I/O Voltage Standards | 3.3 V or 5 V configurable | β |
| Maximum Toggle Frequency | 125 MHz | β |
| Package | 208-pin RQFP | 208-RQFP (28x28 mm) with exposed pad |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | -40 Β°C to +85 Β°C (industrial) | -40 C to +105 C |
| Configuration Interface | JTAG / IEEE 1149.1 + serial/parallel EPROM | β |
| Process Geometry | 0.42 Β΅m | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | Non-compliant (legacy 5 V family) |
| Product Family | β | FLEX 8000 |
| Device Series | β | EPF8636A |
| Logic Elements | β | 136 |
| Flip-Flops (Registers) | β | 504 |
| Embedded RAM Blocks | β | 8 x 256 x 8 bits |
| Logic Block Type | β | 4-input LUT with fast-carry chain |
| I/O Voltage Tolerance | β | 3.3 V or 5 V |
| Speed Grade | β | -4 |
| Process Technology | β | 5 V CMOS, 0.42 um |
| Configuration Method | β | Serial configuration EEPROM (in-system) |
| JTAG / Boundary Scan | β | IEEE 1149.1 compliant |