EPM240GT100C4 vs EPM240T100A5N Comparison

Detailed side-by-side comparison of EPM240GT100C4 by Altera and EPM240T100A5N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM240GT100C4 EPM240GT100C4 - MAX II CPLD, 240 LE, 100-TQFP | Altera

EPM240GT100C4 - MAX II CPLD, 240 LE, 100-TQFP | Altera

EPM240GT100C4 βœ“ Active

Specification Comparison

Parameter EPM240GT100C4 EPM240T100A5N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Active
Stock Status In Stock In Stock
Unit Price (USD) $6.50 $7.05
Family MAX II MAX II
Logic Elements (LE) 240 240
Equivalent Macrocells 192 β€”
Pin-to-Pin Delay (tPD) 4.7 ns β€”
Propagation Delay 6.1 ns (max) β€”
User I/O Pins (max) 80 β€”
On-chip Flash Memory (UFM) 8 Kbits β€”
Process Technology 0.18-Β΅m, 6-layer-metal flash CMOS 0.18 Β΅m
Package 100-TQFP (TQFP-100), 16 x 16 mm, 0.5 mm pitch 100-pin TQFP (14 x 14 x 1.0 mm)
I/O Standards Supported 1.5 V, 1.8 V, 2.5 V, 3.3 V (MultiVolt) β€”
Programming Interface JTAG (IEEE 1149.1) / In-System Programmable (ISP) JTAG (IEEE 1149.1) / ISP
Operating Temperature Range 0Β°C to +85Β°C (Commercial) β€”
Supply Voltage (Core) 3.3 V β€”
Mounting Type Surface Mount (Gull-Wing leads) Surface Mount
Lead-Free / RoHS Lead-Free (per FindIC entry); RoHS compliance [DATA_NEEDED: verify against manufacturer datasheet] β€”
Macro Cells β€” 192
User I/O Count β€” 80
Pin-to-Pin Logic Delay (tPD) β€” 4.7 ns
Maximum Internal Frequency β€” 201.1 MHz
Supply Voltage β€” 2.5 V / 3.3 V
I/O Bank Count β€” 4 (multi-voltage)
Configuration Memory β€” On-chip Flash (instant-on)
Operating Temperature β€” 0C to +85C (commercial, "A5N" suffix)
RoHS Status β€” Compliant (Pb-free)

Datasheets & Resources

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