EPM240GT100C5 vs EPM240GT100C4 Comparison

Detailed side-by-side comparison of EPM240GT100C5 by Intel and EPM240GT100C4 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM240GT100C4 EPM240GT100C4 - MAX II CPLD, 240 LE, 100-TQFP | Altera

EPM240GT100C4 - MAX II CPLD, 240 LE, 100-TQFP | Altera

EPM240GT100C4 βœ“ Active

Specification Comparison

Parameter EPM240GT100C5 EPM240GT100C4
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Active
Stock Status In Stock In Stock
Unit Price (USD) $4.35 $6.50
Series MAX II β€”
Family MAX II G MAX II
Logic Elements 240 β€”
Equivalent Macrocells 192 192
User I/O Pins 80 β€”
Logic Blocks / LABs 24 β€”
Pin-to-Pin Delay (tPD) 4.7 ns (C5 speed grade) 4.7 ns
Maximum Operating Frequency [DATA_NEEDED: fMAX internal] β€”
User Flash Memory (UFM) 8 Kbits β€”
Programmable Type In-System Programmable (Flash) β€”
Core Supply Voltage (VCCINT) 1.71 V to 1.89 V (1.8 V typical) β€”
I/O Supply Voltage (VCCIO) 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) β€”
Operating Temperature 0C to +85C (commercial) β€”
Package 100-pin TQFP (14 x 14 mm) 100-TQFP (TQFP-100), 16 x 16 mm, 0.5 mm pitch
Mounting Type Surface Mount Surface Mount (Gull-Wing leads)
MSL Level 3 (168 hours) β€”
RoHS Status Compliant β€”
JTAG / ISP Yes (IEEE 1532 compliant) β€”
Logic Elements (LE) β€” 240
Propagation Delay β€” 6.1 ns (max)
User I/O Pins (max) β€” 80
On-chip Flash Memory (UFM) β€” 8 Kbits
Process Technology β€” 0.18-Β΅m, 6-layer-metal flash CMOS
I/O Standards Supported β€” 1.5 V, 1.8 V, 2.5 V, 3.3 V (MultiVolt)
Programming Interface β€” JTAG (IEEE 1149.1) / In-System Programmable (ISP)
Operating Temperature Range β€” 0Β°C to +85Β°C (Commercial)
Supply Voltage (Core) β€” 3.3 V
Lead-Free / RoHS β€” Lead-Free (per FindIC entry); RoHS compliance [DATA_NEEDED: verify against manufacturer datasheet]

Datasheets & Resources

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