EPM240T100C5 vs EPM240T100C4N Comparison

Detailed side-by-side comparison of EPM240T100C5 by Altera and EPM240T100C4N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM240T100C5

EPM240T100C5 - MAX II CPLD, 192 Macrocells, 100-TQFP | Altera

EPM240T100C5 βœ“ Active
Altera
EPM240T100C4N

EPM240T100C4N - MAX II 192-MacroCell CPLD, 4.7ns TQFP-100 | Altera

EPM240T100C4N βœ“ Active

Specification Comparison

Parameter EPM240T100C5 EPM240T100C4N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Active
Stock Status In Stock In Stock
Unit Price (USD) $6.20 $6.10
Family MAX II MAX II
Device Type CPLD (Complex Programmable Logic Device) β€”
Macrocells 192 β€”
Maximum User I/O Pins 80 β€”
Logic Elements 240 240
Non-volatile Memory 8 Kbits (embedded Flash) β€”
Pin-to-Pin Logic Delay (tPD1) 4.7 ns β€”
Maximum Internal Frequency 201.1 MHz β€”
Process Technology 0.18 Β΅m, 6-layer metal Flash 0.18 Β΅m
Core Supply Voltage 2.5 V / 3.3 V β€”
I/O Voltage Support 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt I/O) β€”
I/O Banks 4 β€”
Package 100-pin TQFP (14 mm Γ— 14 mm Γ— 1 mm) β€”
Programming Interface JTAG (IEEE 1149.1) / ISP β€”
Operating Temperature 0C to +85C (Commercial) 0 Β°C to +85 Β°C (commercial, 'C' suffix)
Chip-wide Output Enable DEV_OE pin β€”
Device β€” EPM240
Macro Cells β€” 192
Propagation Delay (tPD) β€” 4.7 ns (max)
Maximum Frequency β€” 247.5 MHz
User I/O β€” 80
Supply Voltage - Internal β€” 2.5 V / 3.3 V
I/O Voltage (MultiVolt) β€” 1.5 V / 1.8 V / 2.5 V / 3.3 V
Programmable Type β€” In-System Programmable (Flash)
Package / Case β€” 100-TQFP
Mounting Type β€” Surface Mount
JTAG Support β€” IEEE 1149.1 boundary-scan
RoHS Status β€” Compliant (lead-free, 'N' suffix)

Datasheets & Resources

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