EPM240T100C5 vs EPM240T100C5N Comparison

Detailed side-by-side comparison of EPM240T100C5 by Altera and EPM240T100C5N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM240T100C5

EPM240T100C5 - MAX II CPLD, 192 Macrocells, 100-TQFP | Altera

EPM240T100C5 βœ“ Active
Altera
EPM240T100C5N

EPM240T100C5N - 240-LE MAX II CPLD, 100-TQFP | Intel / Altera

EPM240T100C5N βœ“ Active

Specification Comparison

Parameter EPM240T100C5 EPM240T100C5N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Active
Stock Status In Stock In Stock
Unit Price (USD) $6.20 $4.32
Family MAX II MAX II
Device Type CPLD (Complex Programmable Logic Device) β€”
Macrocells 192 β€”
Maximum User I/O Pins 80 β€”
Logic Elements 240 β€”
Non-volatile Memory 8 Kbits (embedded Flash) β€”
Pin-to-Pin Logic Delay (tPD1) 4.7 ns β€”
Maximum Internal Frequency 201.1 MHz 201.1 MHz
Process Technology 0.18 Β΅m, 6-layer metal Flash 0.18 Β΅m, 6-layer-metal flash
Core Supply Voltage 2.5 V / 3.3 V 2.5 V / 3.3 V
I/O Voltage Support 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt I/O) β€”
I/O Banks 4 β€”
Package 100-pin TQFP (14 mm Γ— 14 mm Γ— 1 mm) 100-pin TQFP (T100)
Programming Interface JTAG (IEEE 1149.1) / ISP IEEE 1149.1 JTAG (in-system programmable)
Operating Temperature 0C to +85C (Commercial) 0 Β°C to +85 Β°C (commercial)
Chip-wide Output Enable DEV_OE pin β€”
Logic Elements (LE) β€” 240
Equivalent Macrocells β€” 192
User Flash Memory β€” 8 Kbits
Maximum User I/O β€” 80
Propagation Delay (tPD) β€” 4.7 ns (speed grade 5)
Number of I/O Banks β€” 4
MultiVolt I/O Support β€” 1.5 V, 1.8 V, 2.5 V, 3.3 V
Configuration Memory β€” Internal non-volatile flash (instant-on)
Mounting Type β€” Surface Mount
RoHS Status β€” Compliant (lead-free, per distributor listings)

Datasheets & Resources

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