EPM240T100I3N vs EPM240GT100C4N Comparison
Detailed side-by-side comparison of EPM240T100I3N by Intel and EPM240GT100C4N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM240T100I3N - 192-Macrocell MAX II CPLD, 100-TQFP, Industrial | Intel
EPM240T100I3N β Last Time BuySpecification Comparison
| Parameter | EPM240T100I3N | EPM240GT100C4N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $5.45 | $5.30 |
| Family | MAX II | MAX II |
| Device Logic Elements / Macrocells | 192 macrocells | β |
| Maximum User I/O Pins | 80 | β |
| Number of Logic Array Blocks (LABs) | 4 | β |
| On-chip User Flash Memory | 8 Kbits | β |
| Internal Performance | 304 MHz | β |
| Pin-to-pin Logic Delay (tPD1) | 4.6 ns | β |
| Global Clock Networks | 4 | β |
| Technology Node | 0.18 um, 6-layer-metal flash CMOS | β |
| Supply Voltage - Core | 2.5 V / 3.3 V | β |
| MultiVolt I/O Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V | β |
| Operating Junction Temperature | -40C to +100C (industrial, 'I' grade) | β |
| Speed Grade | 3 | C4 |
| Package | TQFP-100 (T100), 14x14 mm, 0.5 mm pitch | TQFP-100 (16 Γ 16 mm, 0.5 mm pitch) |
| Programming Interface | JTAG / IEEE 1149.1 ISP | β |
| Instant-on (non-volatile) | Yes (flash-based) | β |
| MSL Level | 3 (per JEDEC J-STD-020) | β |
| RoHS Status | Compliant | Lead-Free / Compliant |
| Logic Elements | β | 240 |
| Macro Cells | β | 192 |
| Maximum User I/O | β | 80 |
| On-chip Flash Memory | β | 8 Kbits |
| Core Voltage | β | 1.8 V |
| I/O Voltage Support | β | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Maximum Operating Frequency | β | 247.5 MHz |
| Propagation Delay (tPD) | β | 6.1 ns |
| Process Technology | β | 0.18 Β΅m 6-layer metal flash |
| Mounting Type | β | Surface Mount |
| Programmability | β | JTAG (IEEE 1149.1) ISP |