EPM240T100I5 vs EPM240T100C3N Comparison
Detailed side-by-side comparison of EPM240T100I5 by Intel and EPM240T100C3N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM240T100I5
EPM240T100I5 - 240-LE MAX II CPLD, TQFP-100, 3.3V | Intel / Altera
EPM240T100I5 β ActiveAltera
EPM240T100C3N
EPM240T100C3N - MAX II 240 LE CPLD, 100-TQFP | Intel/Altera
EPM240T100C3N β ActiveSpecification Comparison
| Parameter | EPM240T100I5 | EPM240T100C3N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $5.88 | $9.05 |
| Family | MAX II | β |
| Series | EPM240 | MAX II |
| Device Sub-family | EPM240T100 | β |
| Logic Elements (LE) | 240 | 240 |
| Equivalent Macrocells | 192 | β |
| User Flash Memory (UFM) | 8 Kbits | 8 Kbits |
| Maximum User I/O Pins | 80 | β |
| Package | TQFP-100 (100-pin) | 100-pin TQFP (14x14 mm) |
| Operating Temperature | -40C to +100C (industrial) | 0 Β°C to +85 Β°C (commercial) |
| Speed Grade | I5 | β |
| Core Voltage | 3.3 V | β |
| MultiVolt I/O Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V | β |
| Propagation Delay (typical) | 4-7 ns | β |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | JTAG (IEEE 1149.1) / ISP |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: rohs status] | Compliant |
| Device Family | β | MAX II CPLD (EPM240) |
| Macrocells | β | 192 |
| User I/O Pins | β | 80 |
| Configuration Memory | β | Internal Flash (non-volatile) |
| Pin-to-Pin Logic Delay (tPD) | β | 4.4 ns (typical) |
| Maximum Operating Frequency | β | 200 MHz (internal oscillator) |
| Core Supply Voltage (VCCINT) | β | 3.0 V to 3.6 V |
| I/O Supply Voltage (VCCIO) | β | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Quiescent Current (typical) | β | 35 mA |
| MSL Level | β | [DATA_NEEDED: MSL rating] |