EPM3032A-TC44-10 vs EPM3032ALC44-4 Comparison

Detailed side-by-side comparison of EPM3032A-TC44-10 by Altera and EPM3032ALC44-4 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3032A-TC44-10 EPM3032ALC44-4
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $7.45 $1.10
Family MAX 3000A MAX 3000A
Macrocells 32 32
Logic Array Blocks 2 β€”
User I/O Pins 34 34
Logic Gates 600 β€”
Propagation Delay (tPD) 10 ns β€”
Maximum Internal Frequency 227.3 MHz β€”
Supply Voltage (VCCINT/VCCIO) 3.0 V to 3.6 V (typ. 3.3 V) β€”
In-System Programmability Yes (IEEE 1149.1 JTAG) β€”
Output Enables 6 β€”
Configuration Memory CMOS EEPROM (non-volatile) β€”
Package TQFP-44 44-pin PLCC (J-Lead)
Mounting Type Surface Mount Surface Mount (PLCC J-Lead)
Operating Temperature (Commercial) 0 Β°C to +70 Β°C β€”
RoHS Status [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS status]
Process Technology CMOS EEPROM β€”
Logic Array Blocks (LABs) β€” 2
Pin-to-Pin Delay (tPD) β€” 4.5 ns
Maximum Counter Frequency β€” 227.3 MHz
Core Supply Voltage (VCCINT) β€” 3.3 V
I/O Supply Voltage (VCCIO) β€” 3.3 V (MultiVolt: 5.0 V / 3.3 V / 2.5 V compatible)
Usable Gates β€” 600 to 10,000 (MAX 3000A family range)
Operating Temperature β€” 0Β°C to +70Β°C (Commercial)
Technology β€” CMOS EEPROM-based
In-System Programmability (ISP) β€” Yes, IEEE Std. 1532 compliant
Boundary-Scan Test β€” IEEE Std. 1149.1 (JTAG)
Programming Interface β€” JTAG (ByteBlaster / MasterBlaster)

Datasheets & Resources

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