EPM3032ALC44-10 vs EPM3032ALC44-10N Comparison

Detailed side-by-side comparison of EPM3032ALC44-10 by Intel and EPM3032ALC44-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3032ALC44-10 EPM3032ALC44-10N
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $0.98 $0.94
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) β€”
Macrocells 32 32
Logic Array Blocks (LABs) 2 2
Usable Gates 600 β€”
Maximum User I/O Pins 34 β€”
Pin-to-Pin Delay (tPD) 10 ns β€”
Maximum Counter Frequency 227.3 MHz β€”
Supply Voltage (VCCINT) 3.3 V 3.3 V
In-System Programming Yes - JTAG (IEEE Std. 1149.1) β€”
Concurrent ISP Yes - IEEE Std. 1532 β€”
Process Technology CMOS EEPROM β€”
Package 44-pin PLCC (J-Lead) 44-pin PLCC (J-Lead, surface mount)
Operating Temperature 0C to +70C (commercial) [DATA_NEEDED: industrial/commercial range]
Mounting Type Surface Mount / Socket Surface Mount
Product Type β€” CPLD (Complex Programmable Logic Device)
Logic Gates β€” 600 gates
User I/O Pins β€” 34
Propagation Delay (tPD) β€” 10 ns
Internal fMAX β€” 103.1 MHz
I/O Voltage (VCCIO) β€” 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt I/O)
Technology β€” CMOS EEPROM-based
In-System Programmability β€” Yes, via IEEE 1149.1 JTAG
ISP Standard Compliance β€” IEEE Std. 1532
Boundary-Scan Test (BST) β€” Yes, IEEE 1149.1 compliant
RoHS Status β€” [DATA_NEEDED: compliant or non-compliant]

Datasheets & Resources

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