EPM3032ALC44-10 vs EPM3032ALC44-7 Comparison

Detailed side-by-side comparison of EPM3032ALC44-10 by Intel and EPM3032ALC44-7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3032ALC44-10 EPM3032ALC44-7
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $0.98 $0.95
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macrocells 32 β€”
Logic Array Blocks (LABs) 2 2
Usable Gates 600 β€”
Maximum User I/O Pins 34 β€”
Pin-to-Pin Delay (tPD) 10 ns β€”
Maximum Counter Frequency 227.3 MHz β€”
Supply Voltage (VCCINT) 3.3 V β€”
In-System Programming Yes - JTAG (IEEE Std. 1149.1) β€”
Concurrent ISP Yes - IEEE Std. 1532 β€”
Process Technology CMOS EEPROM β€”
Package 44-pin PLCC (J-Lead) 44-pin PLCC (J-Lead), 16.59 x 16.59 mm, 3.81 mm height
Operating Temperature 0C to +70C (commercial) 0 Β°C to +70 Β°C (Commercial)
Mounting Type Surface Mount / Socket Surface Mount
Logic Elements / Macrocells β€” 32 macrocells
System Gates β€” 600
Number of User I/O Pins β€” 34
Global Clocks β€” 2
Propagation Delay (tPD1, max) β€” 7.5 ns
Maximum Internal Frequency (fMAX) β€” 138.9 MHz
Supply Voltage (VCCINT / VCCIO) β€” 3.3 V
I/O Tolerant Voltage β€” 2.5 V / 3.3 V / 5.0 V (MultiVolt)
Program Memory Type β€” EEPROM
In-System Programming (ISP) β€” Yes - IEEE 1149.1 JTAG
RoHS Status β€” Not Compliant (per Arrow listing)
Part Status β€” Obsolete
ECCN β€” EAR99

Datasheets & Resources

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