EPM3032ALC44-10N vs EPM3032ALI44-10N Comparison
Detailed side-by-side comparison of EPM3032ALC44-10N by Altera and EPM3032ALI44-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3032ALC44-10N
EPM3032ALC44-10N - 32 Macrocell CPLD, 10ns, 44-PLCC | Altera
EPM3032ALC44-10N NrndAltera
EPM3032ALI44-10N
EPM3032ALI44-10N - MAX 3000A CPLD 32 Macrocells 44-PLCC | Altera
EPM3032ALI44-10N ObsoleteSpecification Comparison
| Parameter | EPM3032ALC44-10N | EPM3032ALI44-10N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.94 | $2.95 |
| Family | MAX 3000A | MAX 3000A |
| Product Type | CPLD (Complex Programmable Logic Device) | β |
| Logic Gates | 600 gates | β |
| Macrocells | 32 | β |
| Logic Array Blocks (LABs) | 2 | β |
| User I/O Pins | 34 | β |
| Propagation Delay (tPD) | 10 ns | β |
| Internal fMAX | 103.1 MHz | β |
| Supply Voltage (VCCINT) | 3.3 V | β |
| I/O Voltage (VCCIO) | 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt I/O) | β |
| Technology | CMOS EEPROM-based | β |
| In-System Programmability | Yes, via IEEE 1149.1 JTAG | β |
| ISP Standard Compliance | IEEE Std. 1532 | β |
| Boundary-Scan Test (BST) | Yes, IEEE 1149.1 compliant | β |
| Package | 44-pin PLCC (J-Lead, surface mount) | 44-LCC (J-Lead), PLCC-44 |
| Mounting Type | Surface Mount | β |
| Operating Temperature | [DATA_NEEDED: industrial/commercial range] | β |
| RoHS Status | [DATA_NEEDED: compliant or non-compliant] | Non-Compliant |
| Programmable Type | β | In System Programmable (ISP) |
| Number of Macrocells | β | 32 |
| Number of Usable Gates | β | 600 |
| Number of I/O | β | 34 |
| Logic Elements / Blocks | β | 2 |
| Pin-to-Pin Delay (tPD) | β | 10 ns (speed grade -10) |
| Counter Frequency | β | 227.3 MHz |
| Core Supply Voltage | β | 3.3 V |
| I/O Voltage Support (MultiVolt) | β | 5.0 V / 3.3 V / 2.5 V |
| Program Memory Type | β | EEPROM (non-volatile) |
| Programming Interface | β | IEEE Std. 1149.1 JTAG |
| Operating Temperature Grade | β | Industrial |
| Lead Free Status | β | Contains Lead |
| PCI Compliance | β | PCI SIG Revision 2.2 (speed grades -4/-5/-6/-7/-10) |