EPM3032ALC44-4 vs EPM3032ALC44-10 Comparison
Detailed side-by-side comparison of EPM3032ALC44-4 by Altera and EPM3032ALC44-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM3032ALC44-10 - MAX 3000A CPLD, 32 Macrocells, 10ns, 44-PLCC | Intel / Altera
EPM3032ALC44-10 ObsoleteSpecification Comparison
| Parameter | EPM3032ALC44-4 | EPM3032ALC44-10 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $1.10 | $0.98 |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 32 | 32 |
| Logic Array Blocks (LABs) | 2 | 2 |
| User I/O Pins | 34 | β |
| Pin-to-Pin Delay (tPD) | 4.5 ns | 10 ns |
| Maximum Counter Frequency | 227.3 MHz | 227.3 MHz |
| Core Supply Voltage (VCCINT) | 3.3 V | β |
| I/O Supply Voltage (VCCIO) | 3.3 V (MultiVolt: 5.0 V / 3.3 V / 2.5 V compatible) | β |
| Usable Gates | 600 to 10,000 (MAX 3000A family range) | 600 |
| Package | 44-pin PLCC (J-Lead) | 44-pin PLCC (J-Lead) |
| Operating Temperature | 0Β°C to +70Β°C (Commercial) | 0C to +70C (commercial) |
| Technology | CMOS EEPROM-based | β |
| In-System Programmability (ISP) | Yes, IEEE Std. 1532 compliant | β |
| Boundary-Scan Test | IEEE Std. 1149.1 (JTAG) | β |
| Programming Interface | JTAG (ByteBlaster / MasterBlaster) | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | β |
| Mounting Type | Surface Mount (PLCC J-Lead) | Surface Mount / Socket |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Maximum User I/O Pins | β | 34 |
| Supply Voltage (VCCINT) | β | 3.3 V |
| In-System Programming | β | Yes - JTAG (IEEE Std. 1149.1) |
| Concurrent ISP | β | Yes - IEEE Std. 1532 |
| Process Technology | β | CMOS EEPROM |