EPM3032ALC44-4 vs EPM3032ALC44-7 Comparison

Detailed side-by-side comparison of EPM3032ALC44-4 by Altera and EPM3032ALC44-7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3032ALC44-4 EPM3032ALC44-7
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $1.10 $0.95
Family MAX 3000A MAX 3000A
Macrocells 32 β€”
Logic Array Blocks (LABs) 2 2
User I/O Pins 34 β€”
Pin-to-Pin Delay (tPD) 4.5 ns β€”
Maximum Counter Frequency 227.3 MHz β€”
Core Supply Voltage (VCCINT) 3.3 V β€”
I/O Supply Voltage (VCCIO) 3.3 V (MultiVolt: 5.0 V / 3.3 V / 2.5 V compatible) β€”
Usable Gates 600 to 10,000 (MAX 3000A family range) β€”
Package 44-pin PLCC (J-Lead) 44-pin PLCC (J-Lead), 16.59 x 16.59 mm, 3.81 mm height
Operating Temperature 0Β°C to +70Β°C (Commercial) 0 Β°C to +70 Β°C (Commercial)
Technology CMOS EEPROM-based β€”
In-System Programmability (ISP) Yes, IEEE Std. 1532 compliant β€”
Boundary-Scan Test IEEE Std. 1149.1 (JTAG) β€”
Programming Interface JTAG (ByteBlaster / MasterBlaster) β€”
RoHS Status [DATA_NEEDED: RoHS status] Not Compliant (per Arrow listing)
Mounting Type Surface Mount (PLCC J-Lead) Surface Mount
Device Type β€” CPLD (Complex Programmable Logic Device)
Logic Elements / Macrocells β€” 32 macrocells
System Gates β€” 600
Number of User I/O Pins β€” 34
Global Clocks β€” 2
Propagation Delay (tPD1, max) β€” 7.5 ns
Maximum Internal Frequency (fMAX) β€” 138.9 MHz
Supply Voltage (VCCINT / VCCIO) β€” 3.3 V
I/O Tolerant Voltage β€” 2.5 V / 3.3 V / 5.0 V (MultiVolt)
Program Memory Type β€” EEPROM
In-System Programming (ISP) β€” Yes - IEEE 1149.1 JTAG
Part Status β€” Obsolete
ECCN β€” EAR99

Datasheets & Resources

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