EPM3032ALC44-7 vs EPM3064ALC44-10 Comparison

Detailed side-by-side comparison of EPM3032ALC44-7 by Altera and EPM3064ALC44-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3032ALC44-7 EPM3064ALC44-10
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $0.95 $4.12
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) β€”
Logic Elements / Macrocells 32 macrocells 64 macrocells
Logic Array Blocks (LABs) 2 β€”
System Gates 600 β€”
Number of User I/O Pins 34 β€”
Global Clocks 2 β€”
Propagation Delay (tPD1, max) 7.5 ns β€”
Maximum Internal Frequency (fMAX) 138.9 MHz β€”
Supply Voltage (VCCINT / VCCIO) 3.3 V β€”
I/O Tolerant Voltage 2.5 V / 3.3 V / 5.0 V (MultiVolt) β€”
Program Memory Type EEPROM β€”
In-System Programming (ISP) Yes - IEEE 1149.1 JTAG β€”
Operating Temperature 0 Β°C to +70 Β°C (Commercial) 0Β°C to +70Β°C (commercial)
Package 44-pin PLCC (J-Lead), 16.59 x 16.59 mm, 3.81 mm height 44-PLCC (J-Lead)
Mounting Type Surface Mount Surface Mount (PLCC socket compatible)
RoHS Status Not Compliant (per Arrow listing) Compliant (lead-free L suffix indicates Pb-free package)
Part Status Obsolete β€”
ECCN EAR99 β€”
Number of Logic Array Blocks (LABs) β€” 4
Usable Gates β€” 1,250
Maximum User I/O Pins β€” 34
Supply Voltage (VCCINT) β€” 3.3 V
Pin-to-Pin Delay (tPD) β€” 10 ns
Maximum Counter Frequency (fCNT) β€” 192.3 MHz
Maximum Operating Frequency (fMAX) β€” [DATA_NEEDED: fMAX internal]
Process Technology β€” 0.30 Β΅m CMOS EEPROM
Programmability β€” In-system programmable (JTAG IEEE 1149.1)
MultiVolt I/O β€” 2.5V / 3.3V / 5.0V interface compatible

Datasheets & Resources

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