EPM3032ATC44-10NAB vs EPM3032ATC44-10N Comparison
Detailed side-by-side comparison of EPM3032ATC44-10NAB by Intel and EPM3032ATC44-10N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM3032ATC44-10NAB - 32-Macrocell CPLD, 10ns, 3.3V | Intel (Altera)
EPM3032ATC44-10NAB ObsoleteSpecification Comparison
| Parameter | EPM3032ATC44-10NAB | EPM3032ATC44-10N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $4.10 | $2.46 |
| Product Family | MAX 3000A | β |
| Device Type | CPLD (Complex Programmable Logic Device) | β |
| Logic Elements / Macrocells | 32 macrocells | β |
| Usable Gates | 600 | 600 |
| Pin-to-Pin Delay (tPD) | 10 ns | β |
| Maximum Operating Frequency | 103.1 MHz (per Arrow listing) | β |
| Number of User I/O | 34 (max for 44-pin TQFP package) | β |
| Core Supply Voltage (VCCINT) | 3.3 V | 3.3 V |
| I/O Supply Voltage (VCCIO) | 3.3 V (MultiVolt I/O compatible with 5.0 V, 3.3 V, 2.5 V logic) | β |
| Package | 44-pin TQFP | 44-pin TQFP |
| Mounting Type | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE Std. 1149.1 / IEEE Std. 1532 ISP) | β |
| Configuration Memory | Non-volatile EEPROM | EEPROM (non-volatile, instant-on) |
| Hot-Socketing Support | Yes | β |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | β |
| RoHS Status | Compliant (per -NAB suffix convention) | Compliant (lead-free) |
| Delivery Form | Tray ('AB' suffix per Altera order code convention) | β |
| Process Technology | CMOS, EEPROM-based | β |
| Series | β | MAX 3000A |
| Device Family | β | CPLD - Complex Programmable Logic Device |
| Macrocells | β | 32 |
| Logic Array Blocks (LABs) | β | 2 |
| User I/O Pins | β | 34 |
| Pin-to-Pin Logic Delay (tPD) | β | 10 ns |
| Maximum Counter Frequency (fCNT) | β | 138.9 MHz |
| I/O Logic Level Support | β | 5.0 V / 3.3 V / 2.5 V (MultiVolt) |
| In-System Programmability | β | Yes, IEEE 1149.1 JTAG |
| ISP Standard Compliance | β | IEEE Std. 1532 |
| Open-Drain I/O Option | β | Yes, per pin |
| Operating Temperature (Commercial) | β | 0 C to +70 C |