EPM3032ATI44-10N vs EPM3032ATC44-10N Comparison
Detailed side-by-side comparison of EPM3032ATI44-10N by Intel and EPM3032ATC44-10N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM3032ATI44-10N
EPM3032ATI44-10N - 600-Gate 32-Macrocell 3.3V CPLD | Intel / Altera
EPM3032ATI44-10N ObsoleteIntel
EPM3032ATC44-10N
EPM3032ATC44-10N - MAX 3000A CPLD, 32 Macro, 10ns | Intel
EPM3032ATC44-10N ObsoleteSpecification Comparison
| Parameter | EPM3032ATI44-10N | EPM3032ATC44-10N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $5.10 | $2.46 |
| Family | MAX 3000A | β |
| Logic Capacity | 600 usable gates | β |
| Number of Macrocells | 32 | β |
| Number of User I/Os | 34 | β |
| Package / Case | TQFP-44 (10x10 mm, 0.8 mm pitch) | β |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V (3.3 V typical) | β |
| MultiVolt I/O Interface | 5.0 V, 3.3 V, 2.5 V compatible | β |
| Pin-to-Pin Delay (tPD) | 10 ns | β |
| Counter Frequency (fCNT) | 103.1 MHz | β |
| Setup Time (tSU) | [DATA_NEEDED: setup time] | β |
| Programmability | In-System Programmable (ISP) via IEEE Std. 1149.1 JTAG | β |
| ISP Standard | IEEE Std. 1532 compliant | β |
| Configuration Memory | Non-volatile EEPROM | EEPROM (non-volatile, instant-on) |
| Hot-Socketing Support | Yes | β |
| Operating Temperature | -40C to +85C (industrial, 'I' grade) | β |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | RoHS Non-Compliant (contains lead) | Compliant (lead-free) |
| Lead-Free Status | Contains lead | β |
| Series | β | MAX 3000A |
| Device Family | β | CPLD - Complex Programmable Logic Device |
| Macrocells | β | 32 |
| Logic Array Blocks (LABs) | β | 2 |
| Usable Gates | β | 600 |
| User I/O Pins | β | 34 |
| Pin-to-Pin Logic Delay (tPD) | β | 10 ns |
| Maximum Counter Frequency (fCNT) | β | 138.9 MHz |
| Core Supply Voltage (VCCINT) | β | 3.3 V |
| I/O Logic Level Support | β | 5.0 V / 3.3 V / 2.5 V (MultiVolt) |
| In-System Programmability | β | Yes, IEEE 1149.1 JTAG |
| ISP Standard Compliance | β | IEEE Std. 1532 |
| Open-Drain I/O Option | β | Yes, per pin |
| Package | β | 44-pin TQFP |
| Operating Temperature (Commercial) | β | 0 C to +70 C |