EPM3064ALC44-10 vs EPM3064ATI44-10 Comparison

Detailed side-by-side comparison of EPM3064ALC44-10 by Altera and EPM3064ATI44-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3064ALC44-10 EPM3064ATI44-10
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $4.12 $7.65
Family MAX 3000A MAX 3000A
Logic Elements / Macrocells 64 macrocells β€”
Number of Logic Array Blocks (LABs) 4 4
Usable Gates 1,250 β€”
Maximum User I/O Pins 34 β€”
Supply Voltage (VCCINT) 3.3 V 3.3 V
Pin-to-Pin Delay (tPD) 10 ns 10 ns
Maximum Counter Frequency (fCNT) 192.3 MHz β€”
Maximum Operating Frequency (fMAX) [DATA_NEEDED: fMAX internal] β€”
Package 44-PLCC (J-Lead) TQFP-44 (10x10 mm, 0.8 mm pitch)
Process Technology 0.30 Β΅m CMOS EEPROM CMOS, EEPROM
Programmability In-system programmable (JTAG IEEE 1149.1) β€”
MultiVolt I/O 2.5V / 3.3V / 5.0V interface compatible β€”
Operating Temperature 0Β°C to +70Β°C (commercial) -40C to +85C (Industrial)
RoHS Status Compliant (lead-free L suffix indicates Pb-free package) Non-Compliant (contains lead, per DigiChip listing)
Mounting Type Surface Mount (PLCC socket compatible) Surface Mount
Product Type β€” CPLD (Complex Programmable Logic Device)
Programmable Type β€” In-System Programmable (ISP), EEPROM-based
Number of Macrocells β€” 64
Number of Usable Gates β€” 1,250
Number of User I/O Pins β€” 34
Maximum Counter Frequency β€” 227.3 MHz
I/O Voltage Tolerance β€” 5.0 V tolerant (MultiVolt I/O)
JTAG Interface β€” IEEE Std. 1149.1 compliant
ISP Standard β€” IEEE Std. 1532
Lead Free Status β€” Contains Lead
Programming Cycles β€” [DATA_NEEDED: typical program/erase endurance]

Datasheets & Resources

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