EPM3064ALC44-4 vs EPM3032ALC44-10 Comparison
Detailed side-by-side comparison of EPM3064ALC44-4 by Altera and EPM3032ALC44-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3064ALC44-4
EPM3064ALC44-4 - 64 Macrocells, 4.5ns CPLD | Altera (Intel)
EPM3064ALC44-4 ObsoleteIntel
EPM3032ALC44-10
EPM3032ALC44-10 - MAX 3000A CPLD, 32 Macrocells, 10ns, 44-PLCC | Intel / Altera
EPM3032ALC44-10 ObsoleteSpecification Comparison
| Parameter | EPM3064ALC44-4 | EPM3032ALC44-10 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $4.36 | $0.98 |
| Manufacturer | Altera (Intel Programmable Solutions Group) | β |
| Part Family | MAX 3000A | β |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 64 | 32 |
| Logic Array Blocks (LABs) | 2 | 2 |
| User I/O Pins | 34 | β |
| Pin-to-Pin Delay (tPD) | 4.5 ns | 10 ns |
| Propagation Delay | 4.5 ns (max) | β |
| Supply Voltage - Internal (VCCINT) | 3.3 V | β |
| Supply Voltage - I/O (VCCIO) | 2.5 V / 3.3 V / 5.0 V | β |
| In-System Programmability | Yes (IEEE 1149.1 JTAG, 3.3-V ISP) | β |
| Program Memory Type | EEPROM (non-volatile) | β |
| Package / Case | 44-LCC (J-Lead), PLCC-44 | β |
| Mounting Type | Surface Mount (PLCC J-Lead, socket-compatible) | Surface Mount / Socket |
| Operating Temperature Grade | Commercial | β |
| Terminal Form | J BEND | β |
| Package Code | QCCJ (J-Lead Chip Carrier) | β |
| Package Shape | Square | β |
| Number of Terminals | 44 | β |
| Technology | CMOS EEPROM | β |
| RoHS Status | [DATA_NEEDED: rohs status] | β |
| Family | β | MAX 3000A |
| Usable Gates | β | 600 |
| Maximum User I/O Pins | β | 34 |
| Maximum Counter Frequency | β | 227.3 MHz |
| Supply Voltage (VCCINT) | β | 3.3 V |
| In-System Programming | β | Yes - JTAG (IEEE Std. 1149.1) |
| Concurrent ISP | β | Yes - IEEE Std. 1532 |
| Process Technology | β | CMOS EEPROM |
| Package | β | 44-pin PLCC (J-Lead) |
| Operating Temperature | β | 0C to +70C (commercial) |