EPM3064ALC44-4N vs EPM3064ATC44-10N Comparison
Detailed side-by-side comparison of EPM3064ALC44-4N by Intel and EPM3064ATC44-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM3064ALC44-4N
EPM3064ALC44-4N - 64-Macrocell CPLD, 4.5ns, 44-PLCC | Intel
EPM3064ALC44-4N β Last Time BuyAltera
EPM3064ATC44-10N
EPM3064ATC44-10N - 64-Macro Cell MAX 3000A CPLD | Altera
EPM3064ATC44-10N β ActiveSpecification Comparison
| Parameter | EPM3064ALC44-4N | EPM3064ATC44-10N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $4.80 | $5.10 |
| Family | MAX 3000A | MAX 3000A |
| Logic Elements / Macrocells | 64 macrocells | β |
| Logic Array Blocks (LABs) | 2 | 4 |
| Usable Gates | 1.25K | 1250 |
| Number of I/O Pins | 34 | β |
| Propagation Delay (tPD) | 4.5 ns | β |
| Maximum Operating Frequency | 222.2 MHz | β |
| Supply Voltage - Core | 3.3 V | β |
| I/O Logic Level Support | 5.0 V / 3.3 V / 2.5 V (MultiVolt) | β |
| Program Memory Type | EEPROM (in-system programmable) | β |
| Programming Interface | IEEE Std 1149.1 JTAG | β |
| Package | 44-pin PLCC (J-lead) | TQFP-44 (10x10 mm) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Hot Socketing | Supported | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | Compliant |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Macro Cells | β | 64 |
| User I/O Pins | β | 34 |
| Pin-to-Pin Delay (tPD) | β | 10 ns |
| Maximum Counter Frequency | β | 192.3 MHz |
| Supply Voltage (VCCINT) | β | 3.3 V |
| I/O Standard | β | MultiVolt (mixed 1.5 V / 1.8 V / 2.5 V / 3.3 V) |
| Configuration Memory | β | EEPROM (non-volatile) |
| In-System Programming | β | IEEE Std. 1532 compliant |
| Boundary-Scan Test | β | IEEE Std. 1149.1 (JTAG) compliant |
| Pin-Locking | β | Yes (across design iterations) |