EPM3064ALC44-7N vs EPM3064ATC-100-10N Comparison
Detailed side-by-side comparison of EPM3064ALC44-7N by Intel and EPM3064ATC-100-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM3064ALC44-7N - 64-Macrocell MAX 3000A CPLD, 7.5ns, 44-PLCC | Intel / Altera
EPM3064ALC44-7N β Last Time BuyAltera
EPM3064ATC-100-10N - 64-Macrocell MAX 3000A CPLD, 10ns | Altera
EPM3064ATC-100-10N β ActiveSpecification Comparison
| Parameter | EPM3064ALC44-7N | EPM3064ATC-100-10N |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $3.95 | $2.20 |
| Family | MAX 3000A | MAX 3000A |
| Logic IC Type | CPLD (Complex Programmable Logic Device) | β |
| Macrocells | 64 | β |
| Logic Array Blocks (LABs) | 2 | 2 |
| Usable Gates | 1,250 | β |
| Number of User I/O Pins | 34 | β |
| Pin-to-Pin Delay (tPD) | 7.5 ns | 10 ns |
| Maximum Frequency | 135.1 MHz | β |
| Core Technology | CMOS EEPROM | β |
| Supply Voltage (VCCINT) | 3.3 V | 3.3 V |
| I/O Tolerance | 5 V-tolerant | β |
| In-System Programmability | Yes (IEEE Std 1149.1 JTAG) | Yes (IEEE 1532 / JTAG 1149.1) |
| Package | 44-pin PLCC | TQFP-100 |
| Mounting Type | Surface Mount (PLCC socket compatible) | Surface Mount |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (commercial) |
| RoHS Status | [DATA_NEEDED: RoHS status] | Compliant |
| Programming Software | Quartus II / Quartus Prime (legacy MAX+PLUS II supported) | β |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Macro Cells | β | 64 |
| User I/O Pins | β | 66 |
| Usable Gates (min) | β | 600 |
| Usable Gates (typical) | β | 1,250 |
| Counter Frequency (fCNT) | β | 227.3 MHz |
| Programming Interface | β | 4-pin JTAG (TCK/TMS/TDI/TDO) |