EPM3064ATC-100-10N vs EPM3064ATC100-10NA Comparison
Detailed side-by-side comparison of EPM3064ATC-100-10N by Altera and EPM3064ATC100-10NA by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3064ATC-100-10N
EPM3064ATC-100-10N - 64-Macrocell MAX 3000A CPLD, 10ns | Altera
EPM3064ATC-100-10N β ActiveIntel
EPM3064ATC100-10NA
EPM3064ATC100-10NA - MAX 3000A CPLD, 64 Macrocells, 10ns, TQFP-100 | Intel (Altera)
EPM3064ATC100-10NA β ActiveSpecification Comparison
| Parameter | EPM3064ATC-100-10N | EPM3064ATC100-10NA |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $2.20 | $4.65 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 64 | β |
| Logic Array Blocks (LABs) | 2 | 4 |
| User I/O Pins | 66 | β |
| Usable Gates (min) | 600 | β |
| Usable Gates (typical) | 1,250 | β |
| Pin-to-Pin Delay (tPD) | 10 ns | 10 ns |
| Counter Frequency (fCNT) | 227.3 MHz | β |
| Supply Voltage (VCCINT) | 3.3 V | 3.3 V |
| In-System Programmability | Yes (IEEE 1532 / JTAG 1149.1) | β |
| Programming Interface | 4-pin JTAG (TCK/TMS/TDI/TDO) | β |
| Package | TQFP-100 | TQFP-100 (0.5 mm pitch) |
| Mounting Type | Surface Mount | β |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (commercial) |
| RoHS Status | Compliant | β |
| Macrocells | β | 64 |
| User I/Os | β | 66 |
| Usable Gates | β | 1,250 |
| Maximum Operating Frequency | β | [DATA_NEEDED: fMAX in MHz] |
| MultiVolt I/O Voltages | β | 2.5 V / 3.3 V / 5.0 V |
| Configuration Memory | β | Non-volatile EEPROM |
| In-System Programming | β | IEEE Std. 1532 compliant |
| Boundary-Scan Test | β | IEEE Std. 1149.1 (JTAG) |
| Lead-Free / RoHS | β | Yes (NA suffix) |