EPM3064ATC-100-10N vs EPM3064ATI100-10N Comparison

Detailed side-by-side comparison of EPM3064ATC-100-10N by Altera and EPM3064ATI100-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM3064ATC-100-10N EPM3064ATC-100-10N - 64-Macrocell MAX 3000A CPLD, 10ns | Altera

EPM3064ATC-100-10N - 64-Macrocell MAX 3000A CPLD, 10ns | Altera

EPM3064ATC-100-10N βœ“ Active

Specification Comparison

Parameter EPM3064ATC-100-10N EPM3064ATI100-10N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Active
Stock Status In Stock In Stock
Unit Price (USD) $2.20 $9.80
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macro Cells 64 β€”
Logic Array Blocks (LABs) 2 4
User I/O Pins 66 β€”
Usable Gates (min) 600 β€”
Usable Gates (typical) 1,250 β€”
Pin-to-Pin Delay (tPD) 10 ns 10 ns (-10 speed grade)
Counter Frequency (fCNT) 227.3 MHz β€”
Supply Voltage (VCCINT) 3.3 V β€”
In-System Programmability Yes (IEEE 1532 / JTAG 1149.1) β€”
Programming Interface 4-pin JTAG (TCK/TMS/TDI/TDO) β€”
Package TQFP-100 100-pin TQFP (industrial)
Mounting Type Surface Mount β€”
Operating Temperature 0C to +70C (commercial) -40 C to +85 C (industrial)
RoHS Status Compliant RoHS Non-Compliant
Programmable Type β€” In-System Programmable (ISP) via IEEE 1149.1 JTAG
Technology β€” CMOS EEPROM
Usable Gates β€” 1,250
Macrocells β€” 64
User I/O β€” 66
Supply Voltage (Core / I/O) β€” 3.3 V
Maximum Internal Frequency β€” 227.3 MHz (counter)
JTAG (IEEE 1149.1) β€” Yes
PCI Compliance β€” PCI Local Bus Specification Revision 2.2 (-4/-5/-6/-7/-10 speed grades)
MultiVolt I/O β€” Supports 2.5 V / 3.3 V / 5 V mixed-voltage interfacing
Lead-Free Status β€” Contains Lead

Datasheets & Resources

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