EPM3064ATC100-10 vs EPM3064ATI100-10N Comparison
Detailed side-by-side comparison of EPM3064ATC100-10 by Altera and EPM3064ATI100-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3064ATC100-10
EPM3064ATC100-10 - 64-Macrocell MAX 3000A CPLD, 100MHz, TQFP-100 | Altera
EPM3064ATC100-10 NrndAltera
EPM3064ATI100-10N
EPM3064ATI100-10N - MAX 3000A CPLD, 64-Macrocell, 100-TQFP | Altera
EPM3064ATI100-10N β ActiveSpecification Comparison
| Parameter | EPM3064ATC100-10 | EPM3064ATI100-10N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $2.85 | $9.80 |
| Family | MAX 3000A | MAX 3000A |
| Logic Gates | 1250 gates | β |
| Macrocells | 64 | 64 |
| Logic Array Blocks | 2 | β |
| User I/O Pins | 34 | β |
| Package | TQFP-100 (100-pin Thin Quad Flat Pack) | 100-pin TQFP (industrial) |
| Propagation Delay (tPD) | 10 ns | β |
| Supply Voltage (VCCINT) | 3.3 V | β |
| Process Technology | CMOS EEPROM | β |
| In-System Programmability | IEEE Std. 1149.1 (JTAG) and IEEE Std. 1532 compliant | β |
| Global Clock Signals | 2 (with optional inversion) | β |
| Output Enable Signals | 6 or 10 pin- or logic-driven | β |
| Output Slew-Rate Control | Programmable | β |
| Operating Temperature Grade | Commercial | β |
| MultiVolt I/O Support | 1.5V / 1.8V / 2.5V / 3.3V interfaces | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | RoHS Non-Compliant |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Programmable Type | β | In-System Programmable (ISP) via IEEE 1149.1 JTAG |
| Technology | β | CMOS EEPROM |
| Usable Gates | β | 1,250 |
| Logic Array Blocks (LABs) | β | 4 |
| User I/O | β | 66 |
| Supply Voltage (Core / I/O) | β | 3.3 V |
| Pin-to-Pin Delay (tPD) | β | 10 ns (-10 speed grade) |
| Maximum Internal Frequency | β | 227.3 MHz (counter) |
| Operating Temperature | β | -40 C to +85 C (industrial) |
| JTAG (IEEE 1149.1) | β | Yes |
| PCI Compliance | β | PCI Local Bus Specification Revision 2.2 (-4/-5/-6/-7/-10 speed grades) |
| MultiVolt I/O | β | Supports 2.5 V / 3.3 V / 5 V mixed-voltage interfacing |
| Lead-Free Status | β | Contains Lead |