EPM3064ATC100-10N vs EPM3064ATC100-4N Comparison
Detailed side-by-side comparison of EPM3064ATC100-10N by Altera and EPM3064ATC100-4N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3064ATC100-10N - MAX 3000A CPLD, 64 Macrocells, 66 I/O | Altera
EPM3064ATC100-10N β ActiveSpecification Comparison
| Parameter | EPM3064ATC100-10N | EPM3064ATC100-4N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $2.43 | $4.60 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 64 | β |
| Logic Array Blocks (LABs) | 2 | β |
| Maximum User I/O Pins | 66 | β |
| Usable Gates | 1,250 | 1,250 |
| Pin-to-Pin Delay (tPD) | 10 ns | 4.5 ns |
| Supply Voltage (VCCINT) | 3.3 V (3.0 V to 3.6 V) | 3.3 V |
| In-System Programmability | Yes - IEEE Std. 1149.1 JTAG, IEEE Std. 1532 | β |
| Boundary-Scan Test (BST) | Yes - JTAG compliant | β |
| Configuration Memory | Non-volatile EEPROM | β |
| Program/Erase Cycles | 100 minimum | β |
| MultiVolt I/O | Yes - 1.8 V / 2.5 V / 3.3 V / 5 V tolerant | β |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Package | 100-pin TQFP | 100-pin TQFP |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | Compliant (lead-free) | [DATA_NEEDED: RoHS status] |
| Macro Cells | β | 64 |
| Logic Array Blocks | β | 2 |
| User I/O Pins | β | 66 |
| Counter Frequency | β | 222.2 MHz (max) |
| I/O Supply Voltage (VCCIO) | β | 3.3 V or 2.5 V |
| Programming Interface | β | IEEE Std. 1149.1 JTAG (ISP) |
| ISP Standard | β | IEEE Std. 1532 |
| Process Technology | β | CMOS EEPROM |