EPM3064ATC100-10N vs EPM3128ATC100-10 Comparison

Detailed side-by-side comparison of EPM3064ATC100-10N by Altera and EPM3128ATC100-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3064ATC100-10N EPM3128ATC100-10
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $2.43 $8.10
Family MAX 3000A β€”
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macrocells 64 128
Logic Array Blocks (LABs) 2 β€”
Maximum User I/O Pins 66 β€”
Usable Gates 1,250 2500
Pin-to-Pin Delay (tPD) 10 ns β€”
Supply Voltage (VCCINT) 3.3 V (3.0 V to 3.6 V) 3.3 V
In-System Programmability Yes - IEEE Std. 1149.1 JTAG, IEEE Std. 1532 β€”
Boundary-Scan Test (BST) Yes - JTAG compliant β€”
Configuration Memory Non-volatile EEPROM EEPROM (non-volatile)
Program/Erase Cycles 100 minimum β€”
MultiVolt I/O Yes - 1.8 V / 2.5 V / 3.3 V / 5 V tolerant β€”
Operating Temperature 0C to +70C (commercial) 0 C to 70 C (commercial)
Package 100-pin TQFP 100-pin TQFP
Mounting Type Surface Mount Surface Mount
RoHS Status Compliant (lead-free) [DATA_NEEDED: RoHS status]
Device Family β€” MAX 3000A
User I/Os β€” 80
Propagation Delay (tPD) β€” 10 ns
Counter Frequency β€” 227.3 MHz
I/O Voltage Tolerance β€” 5.0 V / 3.3 V / 2.5 V (MultiVolt)
In-System Programming β€” IEEE Std. 1532 compliant (JTAG)
PCI Compliance β€” PCI Local Bus Specification Rev 2.2 (selected speed grades)
Logic Family β€” CMOS

Datasheets & Resources

Browse All Products Create BOM Request Quote