EPM3064ATC44-10 vs EPM3032ATC44-10N Comparison
Detailed side-by-side comparison of EPM3064ATC44-10 by Altera and EPM3032ATC44-10N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3064ATC44-10
EPM3064ATC44-10 - 64-Macrocell MAX 3000A CPLD, TQFP-44 | Altera
EPM3064ATC44-10 ObsoleteIntel
EPM3032ATC44-10N
EPM3032ATC44-10N - MAX 3000A CPLD, 32 Macro, 10ns | Intel
EPM3032ATC44-10N ObsoleteSpecification Comparison
| Parameter | EPM3064ATC44-10 | EPM3032ATC44-10N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $4.35 | $2.46 |
| Family | MAX 3000A | β |
| Logic Elements / Macrocells | 64 macrocells | β |
| Usable Gates | 1,250 | 600 |
| Number of Logic Blocks / LABs | 4 LABs | β |
| Propagation Delay (tPD) | 10 ns | β |
| Maximum Internal Frequency | 227.3 MHz (counter speed) | β |
| Programmable I/Os | 34 | β |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V (3.3 V typical) | β |
| I/O Bank Voltage (VCCIO) | MultiVolt 1.5 V / 1.8 V / 2.5 V / 3.3 V | β |
| Technology | CMOS EEPROM, 5 V tolerant I/O | β |
| In-System Programming | IEEE Std. 1532 (JTAG) | β |
| Boundary-Scan Support | IEEE 1149.1 (JTAG) | β |
| Package | TQFP-44, 10 x 10 mm, 0.8 mm pitch | 44-pin TQFP |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature Range | 0C to +70C (commercial) | β |
| RoHS Status | Non-compliant (legacy Altera, Pb-bearing) | Compliant (lead-free) |
| Series | β | MAX 3000A |
| Device Family | β | CPLD - Complex Programmable Logic Device |
| Macrocells | β | 32 |
| Logic Array Blocks (LABs) | β | 2 |
| User I/O Pins | β | 34 |
| Pin-to-Pin Logic Delay (tPD) | β | 10 ns |
| Maximum Counter Frequency (fCNT) | β | 138.9 MHz |
| Core Supply Voltage (VCCINT) | β | 3.3 V |
| I/O Logic Level Support | β | 5.0 V / 3.3 V / 2.5 V (MultiVolt) |
| In-System Programmability | β | Yes, IEEE 1149.1 JTAG |
| ISP Standard Compliance | β | IEEE Std. 1532 |
| Open-Drain I/O Option | β | Yes, per pin |
| Configuration Memory | β | EEPROM (non-volatile, instant-on) |
| Operating Temperature (Commercial) | β | 0 C to +70 C |