EPM3064ATC44-10 vs EPM3064ATI44-10 Comparison
Detailed side-by-side comparison of EPM3064ATC44-10 by Altera and EPM3064ATI44-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3064ATC44-10
EPM3064ATC44-10 - 64-Macrocell MAX 3000A CPLD, TQFP-44 | Altera
EPM3064ATC44-10 ObsoleteIntel
EPM3064ATI44-10
EPM3064ATI44-10 - 64-Macrocell MAX 3000A CPLD, TQFP-44 | Intel / Altera
EPM3064ATI44-10 NrndSpecification Comparison
| Parameter | EPM3064ATC44-10 | EPM3064ATI44-10 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $4.35 | $7.65 |
| Family | MAX 3000A | MAX 3000A |
| Logic Elements / Macrocells | 64 macrocells | β |
| Usable Gates | 1,250 | β |
| Number of Logic Blocks / LABs | 4 LABs | β |
| Propagation Delay (tPD) | 10 ns | β |
| Maximum Internal Frequency | 227.3 MHz (counter speed) | β |
| Programmable I/Os | 34 | β |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V (3.3 V typical) | 3.3 V |
| I/O Bank Voltage (VCCIO) | MultiVolt 1.5 V / 1.8 V / 2.5 V / 3.3 V | β |
| Technology | CMOS EEPROM, 5 V tolerant I/O | β |
| In-System Programming | IEEE Std. 1532 (JTAG) | β |
| Boundary-Scan Support | IEEE 1149.1 (JTAG) | β |
| Package | TQFP-44, 10 x 10 mm, 0.8 mm pitch | TQFP-44 (10x10 mm, 0.8 mm pitch) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature Range | 0C to +70C (commercial) | β |
| RoHS Status | Non-compliant (legacy Altera, Pb-bearing) | Non-Compliant (contains lead, per DigiChip listing) |
| Product Type | β | CPLD (Complex Programmable Logic Device) |
| Programmable Type | β | In-System Programmable (ISP), EEPROM-based |
| Number of Macrocells | β | 64 |
| Number of Logic Array Blocks (LABs) | β | 4 |
| Number of Usable Gates | β | 1,250 |
| Number of User I/O Pins | β | 34 |
| Pin-to-Pin Delay (tPD) | β | 10 ns |
| Maximum Counter Frequency | β | 227.3 MHz |
| I/O Voltage Tolerance | β | 5.0 V tolerant (MultiVolt I/O) |
| JTAG Interface | β | IEEE Std. 1149.1 compliant |
| ISP Standard | β | IEEE Std. 1532 |
| Operating Temperature | β | -40C to +85C (Industrial) |
| Lead Free Status | β | Contains Lead |
| Process Technology | β | CMOS, EEPROM |
| Programming Cycles | β | [DATA_NEEDED: typical program/erase endurance] |