EPM3064ATC44-10N vs EPM3064ATC44-10 Comparison

Detailed side-by-side comparison of EPM3064ATC44-10N by Altera and EPM3064ATC44-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM3064ATC44-10N EPM3064ATC44-10N - 64-Macro Cell MAX 3000A CPLD | Altera

EPM3064ATC44-10N - 64-Macro Cell MAX 3000A CPLD | Altera

EPM3064ATC44-10N βœ“ Active

Specification Comparison

Parameter EPM3064ATC44-10N EPM3064ATC44-10
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $5.10 $4.35
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) β€”
Usable Gates 1250 1,250
Macro Cells 64 β€”
User I/O Pins 34 β€”
Logic Array Blocks (LABs) 4 β€”
Pin-to-Pin Delay (tPD) 10 ns β€”
Maximum Counter Frequency 192.3 MHz β€”
Supply Voltage (VCCINT) 3.3 V 3.0 V to 3.6 V (3.3 V typical)
I/O Standard MultiVolt (mixed 1.5 V / 1.8 V / 2.5 V / 3.3 V) β€”
Configuration Memory EEPROM (non-volatile) β€”
In-System Programming IEEE Std. 1532 compliant IEEE Std. 1532 (JTAG)
Boundary-Scan Test IEEE Std. 1149.1 (JTAG) compliant β€”
Package TQFP-44 (10x10 mm) TQFP-44, 10 x 10 mm, 0.8 mm pitch
Mounting Type Surface Mount Surface Mount
Operating Temperature 0C to +70C (commercial) β€”
RoHS Status Compliant Non-compliant (legacy Altera, Pb-bearing)
Pin-Locking Yes (across design iterations) β€”
Logic Elements / Macrocells β€” 64 macrocells
Number of Logic Blocks / LABs β€” 4 LABs
Propagation Delay (tPD) β€” 10 ns
Maximum Internal Frequency β€” 227.3 MHz (counter speed)
Programmable I/Os β€” 34
I/O Bank Voltage (VCCIO) β€” MultiVolt 1.5 V / 1.8 V / 2.5 V / 3.3 V
Technology β€” CMOS EEPROM, 5 V tolerant I/O
Boundary-Scan Support β€” IEEE 1149.1 (JTAG)
Operating Temperature Range β€” 0C to +70C (commercial)

Datasheets & Resources

Browse All Products Create BOM Request Quote