EPM3064ATC44-10NAF vs EPM3064ATC44-7N Comparison
Detailed side-by-side comparison of EPM3064ATC44-10NAF by Altera and EPM3064ATC44-7N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3064ATC44-10NAF
EPM3064ATC44-10NAF - 64-Macrocell MAX 3000A CPLD, 10ns TQFP-44 | Intel
EPM3064ATC44-10NAF NrndAltera
EPM3064ATC44-7N
EPM3064ATC44-7N - MAX 3000A CPLD, 64 Macro, 34 I/O, 7.5ns | Altera
EPM3064ATC44-7N ObsoleteSpecification Comparison
| Parameter | EPM3064ATC44-10NAF | EPM3064ATC44-7N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $5.05 | $2.30 |
| Series | MAX 3000A | β |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 64 | 64 |
| Logic Elements / LABs | 4 LABs (16 macrocells per LAB) | β |
| Usable Gates | 1250 | 1,250 |
| Number of I/O Pins | 34 | β |
| Propagation Delay (tPD, max) | 10 ns | β |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V | β |
| I/O Voltage Tolerance | Multi-voltage (3.3 V / 2.5 V / 1.8 V capable) | β |
| Programmable Technology | EEPROM (non-volatile) | β |
| In-System Programmable | Yes (IEEE Std. 1532 compliant) | β |
| Boundary-Scan Test | Yes (IEEE Std. 1149.1 JTAG) | β |
| Pin-Locking | Yes | β |
| Package | TQFP-44 (10x10 mm) | 44-pin TQFP |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | [DATA_NEEDED: industrial/commercial grade] | 0Β°C to +85Β°C (commercial) |
| Lead Finish | Lead-free (NiPdAu, AF suffix) | β |
| RoHS Status | Compliant | Compliant |
| Configuration Memory Cycles | 100 erase/program cycles | β |
| Family | β | MAX 3000A |
| Logic Array Blocks | β | 2 |
| User I/O Pins | β | 34 |
| Number of Pins | β | 44 |
| Speed Grade | β | -7 (7.5 ns pin-to-pin delay) |
| Pin-to-Pin Delay (tPD) | β | 7.5 ns |
| Maximum Counter Frequency | β | 192.3 MHz (-7 grade) |
| Supply Voltage (VCC) | β | 3.3 V |
| MultiVolt I/O | β | 1.8 V / 2.5 V / 3.3 V |
| Programmability | β | EEPROM, in-system programmable (ISP) |
| JTAG Interface | β | IEEE Std. 1149.1 compliant |
| ISP Standard | β | IEEE Std. 1532 compliant |
| Boundary-Scan Test (BST) | β | Built-in, JTAG-driven |