EPM3064ATC44-4N vs EPM3064ATC44-10N Comparison

Detailed side-by-side comparison of EPM3064ATC44-4N by Altera and EPM3064ATC44-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM3064ATC44-10N EPM3064ATC44-10N - 64-Macro Cell MAX 3000A CPLD | Altera

EPM3064ATC44-10N - 64-Macro Cell MAX 3000A CPLD | Altera

EPM3064ATC44-10N βœ“ Active

Specification Comparison

Parameter EPM3064ATC44-4N EPM3064ATC44-10N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Active
Stock Status In Stock In Stock
Unit Price (USD) $3.45 $5.10
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macro Cells 64 64
Logic Array Blocks 2 β€”
Number of I/Os 34 β€”
Dedicated Inputs 4 β€”
Usable Gates 1,250 1250
Propagation Delay (tpd) 4.5 ns β€”
Maximum Counter Frequency 222.2 MHz 192.3 MHz
Supply Voltage (VCCINT) 3.3 V 3.3 V
I/O Supply Voltage (VCCIO) 2.5 V or 3.3 V β€”
Programmability EEPROM, in-system programmable (JTAG) β€”
JTAG Support IEEE Std. 1149.1 (boundary-scan) and IEEE Std. 1532 (ISP) β€”
Operating Temperature 0C to +70C (commercial) 0C to +70C (commercial)
Package 44-pin TQFP TQFP-44 (10x10 mm)
Mounting Type Surface Mount Surface Mount
RoHS Status [DATA_NEEDED: rohs status] Compliant
User I/O Pins β€” 34
Logic Array Blocks (LABs) β€” 4
Pin-to-Pin Delay (tPD) β€” 10 ns
I/O Standard β€” MultiVolt (mixed 1.5 V / 1.8 V / 2.5 V / 3.3 V)
Configuration Memory β€” EEPROM (non-volatile)
In-System Programming β€” IEEE Std. 1532 compliant
Boundary-Scan Test β€” IEEE Std. 1149.1 (JTAG) compliant
Pin-Locking β€” Yes (across design iterations)

Datasheets & Resources

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