EPM3064ATC44-4N vs EPM3064ATC44-7 Comparison
Detailed side-by-side comparison of EPM3064ATC44-4N by Altera and EPM3064ATC44-7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM3064ATC44-4N
EPM3064ATC44-4N - 64-Macrocell 3.3V CPLD, 4.5ns TQFP-44 | Altera
EPM3064ATC44-4N NrndAltera
EPM3064ATC44-7
EPM3064ATC44-7 - MAX 3000A CPLD, 64 Macrocells, 44-TQFP | Altera
EPM3064ATC44-7 ObsoleteSpecification Comparison
| Parameter | EPM3064ATC44-4N | EPM3064ATC44-7 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $3.45 | $4.20 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 64 | β |
| Logic Array Blocks | 2 | 4 |
| Number of I/Os | 34 | β |
| Dedicated Inputs | 4 | β |
| Usable Gates | 1,250 | 1.25K |
| Propagation Delay (tpd) | 4.5 ns | β |
| Maximum Counter Frequency | 222.2 MHz | 192.3 MHz |
| Supply Voltage (VCCINT) | 3.3 V | β |
| I/O Supply Voltage (VCCIO) | 2.5 V or 3.3 V | β |
| Programmability | EEPROM, in-system programmable (JTAG) | β |
| JTAG Support | IEEE Std. 1149.1 (boundary-scan) and IEEE Std. 1532 (ISP) | β |
| Operating Temperature | 0C to +70C (commercial) | 0C to +70C (Commercial) |
| Package | 44-pin TQFP | TQFP-44 |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: rohs status] | unknown |
| Macrocells | β | 64 |
| User I/O Pins | β | 34 |
| Pin Count | β | 44 |
| Speed Grade | β | -7 (7.5 ns tPD) |
| Pin-to-Pin Propagation Delay | β | 7.5 ns |
| Supply Voltage (Core) | β | 3.3 V |
| I/O Logic Compatibility | β | 5.0 V / 3.3 V / 2.5 V (MultiVolt) |
| Programming Interface | β | IEEE Std. 1149.1 JTAG (ISP) |
| Process Technology | β | CMOS EEPROM |