EPM3064ATC44-4N vs EPM3064ATI44-4N Comparison

Detailed side-by-side comparison of EPM3064ATC44-4N by Altera and EPM3064ATI44-4N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3064ATC44-4N EPM3064ATI44-4N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $3.45 $4.25
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macro Cells 64 β€”
Logic Array Blocks 2 β€”
Number of I/Os 34 β€”
Dedicated Inputs 4 β€”
Usable Gates 1,250 1,250 gates
Propagation Delay (tpd) 4.5 ns β€”
Maximum Counter Frequency 222.2 MHz β€”
Supply Voltage (VCCINT) 3.3 V β€”
I/O Supply Voltage (VCCIO) 2.5 V or 3.3 V β€”
Programmability EEPROM, in-system programmable (JTAG) β€”
JTAG Support IEEE Std. 1149.1 (boundary-scan) and IEEE Std. 1532 (ISP) β€”
Operating Temperature 0C to +70C (commercial) -40C to +85C (industrial)
Package 44-pin TQFP 44-pin TQFP
Mounting Type Surface Mount Surface Mount
RoHS Status [DATA_NEEDED: rohs status] [DATA_NEEDED: rohs status]
Logic Elements / Macrocells β€” 64 macrocells
Number of Logic Array Blocks (LABs) β€” 4 LABs (16 macrocells each)
Maximum Operating Frequency β€” 222.2 MHz
Pin-to-Pin Propagation Delay (tPD) β€” 4.5 ns (-4 speed grade)
Supply Voltage - Core (VCCINT) β€” 3.3 V
Supply Voltage - I/O (VCCIO) β€” 3.3 V or 2.5 V
User I/O Pins β€” 34 I/O
Programming Interface β€” IEEE Std. 1149.1 JTAG, IEEE Std. 1532 ISP
Configuration Memory β€” EEPROM (non-volatile)

Datasheets & Resources

Browse All Products Create BOM Request Quote