EPM3064ATC44-7 vs EPM3064ATC44-10N Comparison
Detailed side-by-side comparison of EPM3064ATC44-7 by Altera and EPM3064ATC44-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM3064ATC44-7 | EPM3064ATC44-10N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $4.20 | $5.10 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macrocells | 64 | β |
| Logic Array Blocks | 4 | β |
| Usable Gates | 1.25K | 1250 |
| User I/O Pins | 34 | 34 |
| Pin Count | 44 | β |
| Package | TQFP-44 | TQFP-44 (10x10 mm) |
| Speed Grade | -7 (7.5 ns tPD) | β |
| Pin-to-Pin Propagation Delay | 7.5 ns | β |
| Maximum Counter Frequency | 192.3 MHz | 192.3 MHz |
| Supply Voltage (Core) | 3.3 V | β |
| I/O Logic Compatibility | 5.0 V / 3.3 V / 2.5 V (MultiVolt) | β |
| Programming Interface | IEEE Std. 1149.1 JTAG (ISP) | β |
| Process Technology | CMOS EEPROM | β |
| Operating Temperature | 0C to +70C (Commercial) | 0C to +70C (commercial) |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | unknown | Compliant |
| Macro Cells | β | 64 |
| Logic Array Blocks (LABs) | β | 4 |
| Pin-to-Pin Delay (tPD) | β | 10 ns |
| Supply Voltage (VCCINT) | β | 3.3 V |
| I/O Standard | β | MultiVolt (mixed 1.5 V / 1.8 V / 2.5 V / 3.3 V) |
| Configuration Memory | β | EEPROM (non-volatile) |
| In-System Programming | β | IEEE Std. 1532 compliant |
| Boundary-Scan Test | β | IEEE Std. 1149.1 (JTAG) compliant |
| Pin-Locking | β | Yes (across design iterations) |