EPM3064ATC44-7N vs EPM3064ATC44-10 Comparison

Detailed side-by-side comparison of EPM3064ATC44-7N by Altera and EPM3064ATC44-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3064ATC44-7N EPM3064ATC44-10
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $2.30 $4.35
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) β€”
Macro Cells 64 β€”
Logic Array Blocks 2 β€”
Usable Gates 1,250 1,250
User I/O Pins 34 β€”
Number of Pins 44 β€”
Speed Grade -7 (7.5 ns pin-to-pin delay) β€”
Pin-to-Pin Delay (tPD) 7.5 ns β€”
Maximum Counter Frequency 192.3 MHz (-7 grade) β€”
Supply Voltage (VCC) 3.3 V β€”
MultiVolt I/O 1.8 V / 2.5 V / 3.3 V β€”
Programmability EEPROM, in-system programmable (ISP) β€”
JTAG Interface IEEE Std. 1149.1 compliant β€”
ISP Standard IEEE Std. 1532 compliant β€”
Boundary-Scan Test (BST) Built-in, JTAG-driven β€”
Package 44-pin TQFP TQFP-44, 10 x 10 mm, 0.8 mm pitch
Operating Temperature 0Β°C to +85Β°C (commercial) β€”
Mounting Type Surface Mount Surface Mount
RoHS Status Compliant Non-compliant (legacy Altera, Pb-bearing)
Logic Elements / Macrocells β€” 64 macrocells
Number of Logic Blocks / LABs β€” 4 LABs
Propagation Delay (tPD) β€” 10 ns
Maximum Internal Frequency β€” 227.3 MHz (counter speed)
Programmable I/Os β€” 34
Supply Voltage (VCCINT) β€” 3.0 V to 3.6 V (3.3 V typical)
I/O Bank Voltage (VCCIO) β€” MultiVolt 1.5 V / 1.8 V / 2.5 V / 3.3 V
Technology β€” CMOS EEPROM, 5 V tolerant I/O
In-System Programming β€” IEEE Std. 1532 (JTAG)
Boundary-Scan Support β€” IEEE 1149.1 (JTAG)
Operating Temperature Range β€” 0C to +70C (commercial)

Datasheets & Resources

Browse All Products Create BOM Request Quote