EPM3064ATC44-7N vs EPM3064ATC44-7 Comparison

Detailed side-by-side comparison of EPM3064ATC44-7N by Altera and EPM3064ATC44-7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3064ATC44-7N EPM3064ATC44-7
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $2.30 $4.20
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macro Cells 64 β€”
Logic Array Blocks 2 4
Usable Gates 1,250 1.25K
User I/O Pins 34 34
Number of Pins 44 β€”
Speed Grade -7 (7.5 ns pin-to-pin delay) -7 (7.5 ns tPD)
Pin-to-Pin Delay (tPD) 7.5 ns β€”
Maximum Counter Frequency 192.3 MHz (-7 grade) 192.3 MHz
Supply Voltage (VCC) 3.3 V β€”
MultiVolt I/O 1.8 V / 2.5 V / 3.3 V β€”
Programmability EEPROM, in-system programmable (ISP) β€”
JTAG Interface IEEE Std. 1149.1 compliant β€”
ISP Standard IEEE Std. 1532 compliant β€”
Boundary-Scan Test (BST) Built-in, JTAG-driven β€”
Package 44-pin TQFP TQFP-44
Operating Temperature 0Β°C to +85Β°C (commercial) 0C to +70C (Commercial)
Mounting Type Surface Mount Surface Mount
RoHS Status Compliant unknown
Macrocells β€” 64
Pin Count β€” 44
Pin-to-Pin Propagation Delay β€” 7.5 ns
Supply Voltage (Core) β€” 3.3 V
I/O Logic Compatibility β€” 5.0 V / 3.3 V / 2.5 V (MultiVolt)
Programming Interface β€” IEEE Std. 1149.1 JTAG (ISP)
Process Technology β€” CMOS EEPROM

Datasheets & Resources

Browse All Products Create BOM Request Quote