EPM3064ATC44-7N vs EPM3064ATI44-7N Comparison

Detailed side-by-side comparison of EPM3064ATC44-7N by Altera and EPM3064ATI44-7N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM3064ATC44-7N EPM3064ATI44-7N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $2.30 $5.10
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) β€”
Macro Cells 64 β€”
Logic Array Blocks 2 β€”
Usable Gates 1,250 1,250 gates
User I/O Pins 34 β€”
Number of Pins 44 β€”
Speed Grade -7 (7.5 ns pin-to-pin delay) β€”
Pin-to-Pin Delay (tPD) 7.5 ns β€”
Maximum Counter Frequency 192.3 MHz (-7 grade) β€”
Supply Voltage (VCC) 3.3 V β€”
MultiVolt I/O 1.8 V / 2.5 V / 3.3 V β€”
Programmability EEPROM, in-system programmable (ISP) β€”
JTAG Interface IEEE Std. 1149.1 compliant β€”
ISP Standard IEEE Std. 1532 compliant β€”
Boundary-Scan Test (BST) Built-in, JTAG-driven β€”
Package 44-pin TQFP 44-pin TQFP (10x10 mm, 0.8 mm pitch)
Operating Temperature 0Β°C to +85Β°C (commercial) β€”
Mounting Type Surface Mount β€”
RoHS Status Compliant Compliant (lead-free, 'N' suffix)
Logic Elements / Macrocells β€” 64 macrocells
Maximum Frequency (fMAX) β€” 135.1 MHz
Pin-to-Pin Logic Delay β€” 7 ns (speed grade -7)
User I/O Count β€” 34 I/O
Dedicated Input Pins β€” 4
Supply Voltage (VCCINT) β€” 3.3 V
I/O Bank Voltage (VCCIO) β€” 1.8 V / 2.5 V / 3.3 V / 5 V tolerant (multiVolt)
Program Memory Type β€” EEPROM (in-system programmable)
Programming Interface β€” IEEE 1149.1 JTAG
Operating Temperature Grade β€” Industrial (-40C to +85C)
Process Technology β€” 0.30 Β΅m CMOS EEPROM

Datasheets & Resources

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