EPM3064ATI100-10N vs EPM3064ATC-100-10N Comparison

Detailed side-by-side comparison of EPM3064ATI100-10N by Altera and EPM3064ATC-100-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM3064ATC-100-10N EPM3064ATC-100-10N - 64-Macrocell MAX 3000A CPLD, 10ns | Altera

EPM3064ATC-100-10N - 64-Macrocell MAX 3000A CPLD, 10ns | Altera

EPM3064ATC-100-10N βœ“ Active

Specification Comparison

Parameter EPM3064ATI100-10N EPM3064ATC-100-10N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Active
Stock Status In Stock In Stock
Unit Price (USD) $9.80 $2.20
Family MAX 3000A MAX 3000A
Device Type CPLD (Complex Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Programmable Type In-System Programmable (ISP) via IEEE 1149.1 JTAG β€”
Technology CMOS EEPROM β€”
Usable Gates 1,250 β€”
Macrocells 64 β€”
Logic Array Blocks (LABs) 4 2
User I/O 66 β€”
Supply Voltage (Core / I/O) 3.3 V β€”
Pin-to-Pin Delay (tPD) 10 ns (-10 speed grade) 10 ns
Maximum Internal Frequency 227.3 MHz (counter) β€”
Package 100-pin TQFP (industrial) TQFP-100
Operating Temperature -40 C to +85 C (industrial) 0C to +70C (commercial)
JTAG (IEEE 1149.1) Yes β€”
PCI Compliance PCI Local Bus Specification Revision 2.2 (-4/-5/-6/-7/-10 speed grades) β€”
MultiVolt I/O Supports 2.5 V / 3.3 V / 5 V mixed-voltage interfacing β€”
Lead-Free Status Contains Lead β€”
RoHS Status RoHS Non-Compliant Compliant
Macro Cells β€” 64
User I/O Pins β€” 66
Usable Gates (min) β€” 600
Usable Gates (typical) β€” 1,250
Counter Frequency (fCNT) β€” 227.3 MHz
Supply Voltage (VCCINT) β€” 3.3 V
In-System Programmability β€” Yes (IEEE 1532 / JTAG 1149.1)
Programming Interface β€” 4-pin JTAG (TCK/TMS/TDI/TDO)
Mounting Type β€” Surface Mount

Datasheets & Resources

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